diff options
| author | Tyler Wang <tyler.wang@quanta.corp-partner.google.com> | 2023-08-14 14:47:46 +0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-08-23 07:38:05 +0000 |
| commit | b951bdc156d8db7a9da1cc1a4457686562b8f57a (patch) | |
| tree | ffe72aa2edecd925a94cc17cb5ad07e78412cebe /src/mainboard/google/rex/variants | |
| parent | 3eed673659f62321a48d4d3f1b2a7005eb272493 (diff) | |
mb/google/rex/var/karis: Remove WWAN temperature sensor
According to the schematic, karis does not have a WWAN temperature
sensor, remove related settings.
BUG=b:294155897
TEST=emerge-rex coreboot
Change-Id: Ic82c6cfec067faa37d452bed5c4977402a2139a5
Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77284
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/rex/variants')
| -rw-r--r-- | src/mainboard/google/rex/variants/karis/overridetree.cb | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/src/mainboard/google/rex/variants/karis/overridetree.cb b/src/mainboard/google/rex/variants/karis/overridetree.cb index ae30b6aa41..37f84b2fc6 100644 --- a/src/mainboard/google/rex/variants/karis/overridetree.cb +++ b/src/mainboard/google/rex/variants/karis/overridetree.cb @@ -162,7 +162,6 @@ chip soc/intel/meteorlake register "options.tsr[0].desc" = ""DDR_SOC"" register "options.tsr[1].desc" = ""Ambient"" register "options.tsr[2].desc" = ""Charger"" - register "options.tsr[3].desc" = ""wwan"" ## Active Policy # FIXME: below values are initial reference values only @@ -199,18 +198,6 @@ chip soc/intel/meteorlake TEMP_PCT(65, 70), TEMP_PCT(60, 50), } - }, - [3] = { - .target = DPTF_TEMP_SENSOR_3, - .thresholds = { - TEMP_PCT(75, 90), - TEMP_PCT(70, 80), - TEMP_PCT(65, 70), - TEMP_PCT(60, 60), - TEMP_PCT(55, 50), - TEMP_PCT(50, 40), - TEMP_PCT(45, 30), - } } }" @@ -221,7 +208,6 @@ chip soc/intel/meteorlake [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000), [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 5000), [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000), - [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 80, 5000), }" ## Critical Policy @@ -231,7 +217,6 @@ chip soc/intel/meteorlake [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN), [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN), [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN), - [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 85, SHUTDOWN), }" ## Power Limits Control |