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authorSimon Zhou <zhouguohui@huaqin.corp-partner.google.com>2023-04-14 14:21:00 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2023-04-16 14:07:52 +0000
commit2cf25eb74b3c6e3df8b1dedd80d78c44113e96a3 (patch)
tree92404479af0cdb66ed5175723d898c878e531daf /src/mainboard/google/rex/variants/screebo/gpio.c
parente30d204d386f270b94bdeeb7797342031839c9c8 (diff)
mb/google/rex: Create screebo variant
Create the screebo variant of the rex0 reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:276814951 BRANCH=None TEST=util/abuild/abuild -p none -t google/rex -x -a make sure the build includes GOOGLE_SCREEBO Change-Id: I8d05ca7c0fe596378ca15d0734d46ad1dc63a1f9 Signed-off-by: Simon Zhou <zhouguohui@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74391 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google/rex/variants/screebo/gpio.c')
-rw-r--r--src/mainboard/google/rex/variants/screebo/gpio.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/screebo/gpio.c b/src/mainboard/google/rex/variants/screebo/gpio.c
new file mode 100644
index 0000000000..b6e346f5a4
--- /dev/null
+++ b/src/mainboard/google/rex/variants/screebo/gpio.c
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <types.h>
+#include <soc/gpio.h>
+#include <vendorcode/google/chromeos/chromeos.h>
+
+const struct pad_config *variant_gpio_table(size_t *num)
+{
+ *num = 0;
+ return NULL;
+}
+
+const struct pad_config *variant_early_gpio_table(size_t *num)
+{
+ *num = 0;
+ return NULL;
+}
+
+static const struct cros_gpio cros_gpios[] = {
+};
+
+DECLARE_CROS_GPIOS(cros_gpios);
+
+const struct pad_config *variant_romstage_gpio_table(size_t *num)
+{
+ *num = 0;
+ return NULL;
+}