diff options
| author | Kapil Porwal <kapilporwal@google.com> | 2023-02-25 22:30:21 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-31 18:48:12 +0000 |
| commit | 104567425cdc8dc03bfc06a62da8fe940fa00e5d (patch) | |
| tree | 48050fccf05f03ea776b866ff97b535be55a87e2 /src/mainboard/google/rex/variants/rex0 | |
| parent | 74a986db9fb2d900b5a11a11249b74afc2ee69e8 (diff) | |
mb/google/rex: Enable SoundWire codecs
Enable drivers for SoundWire codecs and define the topology in
the devicetree for the rex0 variant with the SoundWire daughter
board connected.
+------------------+ +--------------------+
| | | Headphone Codec |
| Intel Meteor Lake| +--->|Cirrus Logic CS42L42|
| SoundWire | | | ID 0 |
| Controller | | +--------------------+
| | |
| Link 0 +----+ +-------------------+
| | | Left Speaker Amp |
| Link 1 | +--->| Maxim MAX98363 |
| | | | ID 0 |
| Link 2 +----| +-------------------+
| | |
| Link 3 | | +-------------------+
| | | | Right Speaker Amp |
+------------------+ +--->| Maxim MAX98363 |
| ID 1 |
+-------------------+
This was tested by booting the firmware and dumping the SSDT table
to ensure that all SoundWire ACPI devices are created as expected with
the properties that are defined in coreboot under \_SB.PCI0:
HDAS - Intel Meteor Lake HDA PCI device
HDAS.SNDW - Intel Meteor Lake SoundWire Controller
HDAS.SNDW.SW00 - Cirrus Logic CS42L42 - Headphone Codec
HDAS.SNDW.SW20 - Maxim MAX98363 - Left Speaker Amp
HDAS.SNDW.SW21 - Maxim MAX98363 - Right Speaker Amp
BUG=b:269497731
TEST=Verified SSDT for SNDW in the OS. Playback and recording are also
validated on google/rex.
Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: I3e11dc642ff686ba7da23ed76332f7f10e60fade
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73280
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rex/variants/rex0')
| -rw-r--r-- | src/mainboard/google/rex/variants/rex0/overridetree.cb | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb index c3e2d7bf77..ab9596e1b7 100644 --- a/src/mainboard/google/rex/variants/rex0/overridetree.cb +++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb @@ -767,6 +767,39 @@ chip soc/intel/meteorlake probe AUDIO MAX98360_ALC5682I_I2S end end + chip drivers/intel/soundwire + device generic 0 on + probe AUDIO MAX98363_CS42L42_SNDW + chip drivers/soundwire/cs42l42 + # SoundWire Link 0 ID 0 + register "desc" = ""Headset Codec"" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B07)" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_B06)" + register "ts_inv" = "true" + register "ts_dbnc_rise" = "RISE_DEB_1000_MS" + register "ts_dbnc_fall" = "FALL_DEB_0_MS" + register "btn_det_init_dbnce" = "100" + register "btn_det_event_dbnce" = "10" + register "bias_lvls[0]" = "15" + register "bias_lvls[1]" = "8" + register "bias_lvls[2]" = "4" + register "bias_lvls[3]" = "1" + register "hs_bias_ramp_rate" = "HSBIAS_RAMP_SLOW" + register "hs_bias_sense_disable" = "true" + device generic 0.0 on end + end + chip drivers/soundwire/max98363 + # SoundWire Link 2 ID 0 + register "desc" = ""Left Speaker Amp"" + device generic 2.0 on end + end + chip drivers/soundwire/max98363 + # SoundWire Link 2 ID 1 + register "desc" = ""Right Speaker Amp"" + device generic 2.1 on end + end + end + end end end end |