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authorAamir Bohra <aamir.bohra@intel.com>2020-03-16 18:57:48 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-03-20 09:40:07 +0000
commita1c82c5ebee830fa28a1962618bba4946e68f3ba (patch)
tree5f083cb609cc6f104cbbc80f286c4617c9328272 /src/mainboard/google/reef/variants/coral
parent12b835050f0af9341b257560b60a8060c8fad328 (diff)
drivers/generic/max98357a: Allow custom _HID from config
Add HID field in max98357a_config and allow mainboards to set it. Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Change-Id: I22d2d078a9a4eb6ab330da8439737ff5133086d4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39286 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/reef/variants/coral')
-rw-r--r--src/mainboard/google/reef/variants/coral/devicetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/reef/variants/coral/devicetree.cb b/src/mainboard/google/reef/variants/coral/devicetree.cb
index 1608343d3c..00e63bc94c 100644
--- a/src/mainboard/google/reef/variants/coral/devicetree.cb
+++ b/src/mainboard/google/reef/variants/coral/devicetree.cb
@@ -131,6 +131,7 @@ chip soc/intel/apollolake
device pci 0d.3 on end # - Shared SRAM
device pci 0e.0 on # - Audio
chip drivers/generic/max98357a
+ register "hid" = ""MX98357A""
register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "sdmode_delay" = "5"
device generic 0 on end