diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-07-06 23:16:01 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-07 20:45:28 +0200 |
| commit | 8d3c4d1bb39fa354df59abf55b37fc694a2cb7c9 (patch) | |
| tree | 784c86e9ad296cf903c3aafe75456e117bb50dcf /src/mainboard/google/reef/gpio.h | |
| parent | ebe148d58ee7061c4ee9956e9995bade666a80e4 (diff) | |
mainboard/google/reef: apply EVT board changes
Based on the board revision apply the correct GPIO changes.
The only differences are the addition of 2 peripheral wake signals
and a dedicated peripheral reset line.
BUG=chrome-os-partner:54959,chrome-os-partner:54960,chrome-os-partner:54961
BRANCH=None
TEST=Built and tested on reef.
Change-Id: I9cac82158e70e0af1b454ec4581c2e4622b95b4b
Signed-off-by: Aaron Durbin <adurbin@chromuim.org>
Reviewed-on: https://review.coreboot.org/15562
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/reef/gpio.h')
| -rw-r--r-- | src/mainboard/google/reef/gpio.h | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/src/mainboard/google/reef/gpio.h b/src/mainboard/google/reef/gpio.h index 14cf880cfd..cbad4c6b58 100644 --- a/src/mainboard/google/reef/gpio.h +++ b/src/mainboard/google/reef/gpio.h @@ -274,7 +274,6 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPIO_0, UP_20K, DEEP), PAD_CFG_GPI(GPIO_1, UP_20K, DEEP), PAD_CFG_GPI(GPIO_2, UP_20K, DEEP), - PAD_CFG_GPI(GPIO_3, UP_20K, DEEP), PAD_CFG_GPI(GPIO_4, UP_20K, DEEP), PAD_CFG_GPI(GPIO_5, UP_20K, DEEP), PAD_CFG_GPI(GPIO_6, UP_20K, DEEP), @@ -287,7 +286,6 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPIO_12, UP_20K, DEEP), /* unused */ PAD_CFG_GPI(GPIO_13, UP_20K, DEEP), /* unused */ PAD_CFG_GPI_APIC(GPIO_14, UP_20K, DEEP, LEVEL, NONE), /* FP IRQ */ - PAD_CFG_GPI(GPIO_15, UP_20K, DEEP), /* unused */ PAD_CFG_GPI(GPIO_16, UP_20K, DEEP), /* unused */ PAD_CFG_GPI(GPIO_17, UP_20K, DEEP), /* unused */ PAD_CFG_GPI_APIC(GPIO_18, NONE, DEEP, LEVEL, NONE), /* Trackpad IRQ */ @@ -319,7 +317,6 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPIO_41, NONE, DEEP), /* LPSS_UART0_CTS - EC_IN_RW */ PAD_CFG_NF(GPIO_42, NATIVE, DEEP, NF1), /* LPSS_UART1_RXD */ PAD_CFG_NF(GPIO_43, NATIVE, DEEP, NF1), /* LPSS_UART1_TXD */ - PAD_CFG_NF(GPIO_44, NATIVE, DEEP, NF1), /* LPSS_UART1_RTS */ PAD_CFG_GPI(GPIO_45, UP_20K, DEEP), /* LPSS_UART1_CTS - MEM_CONFIG3 */ PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* LPSS_UART2_RXD */ PAD_CFG_NF(GPIO_47, NATIVE, DEEP, NF1), /* LPSS_UART2_TXD */ @@ -356,5 +353,18 @@ static const struct pad_config early_gpio_table[] = { #define MEM_CONFIG1 GPIO_102 #define MEM_CONFIG0 GPIO_101 +static const struct pad_config proto_diff_table[] = { + PAD_CFG_GPI(GPIO_3, UP_20K, DEEP), /* unused */ + PAD_CFG_GPI(GPIO_15, UP_20K, DEEP), /* unused */ + PAD_CFG_NF(GPIO_44, NATIVE, DEEP, NF1), /* LPSS_UART1_RTS */ +}; + +/* Wake peripheral signals post proto. */ +static const struct pad_config nonproto_diff_table[] = { + PAD_CFG_GPI_SCI(GPIO_3, UP_20K, DEEP, LEVEL, NONE), /* FP_INT_L */ + PAD_CFG_GPI_SCI(GPIO_15, NONE, DEEP, LEVEL, NONE), /* TRACKPAD_INT_1V8_ODL */ + PAD_CFG_GPO(GPIO_44, 1, DEEP), /* GPS_RST_ODL */ +}; + #endif /* __ACPI__ */ #endif /* MAINBOARD_GPIO_H */ |