Combine Baytrail ChromeOS devices using variant scheme

Combine existing boards google/enguarde and google/ninja using
their common reference board google/rambi as a baseboard.

Variants contain board specific data:
 - DPTF ACPI components
 - I2C ACPI devices
 - RAM config / SPD data
 - devicetree config
 - GPIOs
 - board-specific HW components (e.g., LAN)

Additionally, some minor cleanup/changes were made:
 - remove unused ACPI trackpad/touchscreen devices
 - correct I2C addresses in SMBIOS entries
 - clean up comment formatting
 - remove ACPI device for unused light sensor
 - switch I2C ACPI devices from edge to level triggered interrupts,
   for better compatibility/functionality (and to be consistent
   with other recently-upstreamed ChromeOS devices)

The existing enguarde and ninja boards are removed.

Variant setup modeled after google/auron

Change-Id: Iae7855af9a224fd4cb948b854494e39b545ad449
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/18129
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 0 insertions, 40 deletions

diff --git a/src/mainboard/google/rambi/onboard.h b/src/mainboard/google/rambi/onboard.h
deleted file mode 100644
index 04ed332a07..0000000000
--- a/src/mainboard/google/rambi/onboard.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef ONBOARD_H
-#define ONBOARD_H
-
-#include "irqroute.h"
-
-/* PCH wake signal from EC. */
-#define BOARD_PCH_WAKE_GPIO             ACPI_ENABLE_WAKE_SUS_GPIO(0)
-
-#define BOARD_TRACKPAD_NAME             "trackpad"
-#define BOARD_TRACKPAD_IRQ              GPIO_S0_DED_IRQ(TPAD_IRQ_OFFSET)
-#define BOARD_TRACKPAD_WAKE_GPIO        ACPI_ENABLE_WAKE_SUS_GPIO(1)
-#define BOARD_TRACKPAD_I2C_BUS          0
-#define BOARD_TRACKPAD_I2C_ADDR         0x4b
-
-#define BOARD_TOUCHSCREEN_NAME          "touchscreen"
-#define BOARD_TOUCHSCREEN_IRQ           GPIO_S0_DED_IRQ(TOUCH_IRQ_OFFSET)
-#define BOARD_TOUCHSCREEN_WAKE_GPIO     ACPI_ENABLE_WAKE_SUS_GPIO(2)
-#define BOARD_TOUCHSCREEN_I2C_BUS       5
-#define BOARD_TOUCHSCREEN_I2C_ADDR      0x4a    /* TODO(shawnn): Check this */
-
-#define BOARD_I8042_IRQ                 GPIO_S0_DED_IRQ(I8042_IRQ_OFFSET)
-#define BOARD_CODEC_IRQ                 GPIO_S5_DED_IRQ(CODEC_IRQ_OFFSET)
-#define BOARD_ALS_IRQ                   GPIO_S0_DED_IRQ(ALS_IRQ_OFFSET)
-
-#endif