diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2017-01-12 12:19:21 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-01-17 17:57:40 +0100 |
| commit | ce0a56419854d8c2bd0fac401c76139106fc4dd8 (patch) | |
| tree | a6c090fddb240f383de2ad65769a7017e2f530bf /src/mainboard/google/rambi/acpi/superio.asl | |
| parent | e7dbeaeac3f9e37625a5b4cda04e67597972e4ee (diff) | |
Combine Baytrail ChromeOS devices using variant scheme
Combine existing boards google/enguarde and google/ninja using
their common reference board google/rambi as a baseboard.
Variants contain board specific data:
- DPTF ACPI components
- I2C ACPI devices
- RAM config / SPD data
- devicetree config
- GPIOs
- board-specific HW components (e.g., LAN)
Additionally, some minor cleanup/changes were made:
- remove unused ACPI trackpad/touchscreen devices
- correct I2C addresses in SMBIOS entries
- clean up comment formatting
- remove ACPI device for unused light sensor
- switch I2C ACPI devices from edge to level triggered interrupts,
for better compatibility/functionality (and to be consistent
with other recently-upstreamed ChromeOS devices)
The existing enguarde and ninja boards are removed.
Variant setup modeled after google/auron
Change-Id: Iae7855af9a224fd4cb948b854494e39b545ad449
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/18129
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/rambi/acpi/superio.asl')
| -rw-r--r-- | src/mainboard/google/rambi/acpi/superio.asl | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/mainboard/google/rambi/acpi/superio.asl b/src/mainboard/google/rambi/acpi/superio.asl index bd520518a6..adc34aa4cd 100644 --- a/src/mainboard/google/rambi/acpi/superio.asl +++ b/src/mainboard/google/rambi/acpi/superio.asl @@ -13,14 +13,17 @@ * GNU General Public License for more details. */ -/* mainboard configuration */ +/* Baseboard configuration */ #include <mainboard/google/rambi/ec.h> -#include <mainboard/google/rambi/onboard.h> #define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources #define SIO_EC_HOST_ENABLE // EC Host Interface Resources #define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard -// Override default IRQ settings + +/* Variant configuration */ +#include <variant/onboard.h> + +/* Override default IRQ settings */ #define SIO_EC_PS2K_IRQ Interrupt(ResourceConsumer, Edge, ActiveLow) {BOARD_I8042_IRQ} /* ACPI code for EC SuperIO functions */ |