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authorMatt DeVillier <matt.devillier@gmail.com>2024-02-15 15:36:15 -0600
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-02-19 18:09:20 +0000
commitbe23f04ce7ccad902c92766b29abd1577482ec61 (patch)
tree516b209062d83e38b4378d0a8ef8d61a5bcc2173 /src/mainboard/google/puff
parent320adcbe3522bf310735db5a108609df102245f7 (diff)
soc/intel/cannonlake: select SOC_INTEL_COMMON_BLOCK_DTT
Select this at the SoC level (like other modern Intel SoCs), and drop it from individual boards which selected it. Change-Id: I838ada7dfe948c58a5bb9805ade289b07368aa63 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80556 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/mainboard/google/puff')
-rw-r--r--src/mainboard/google/puff/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/puff/Kconfig b/src/mainboard/google/puff/Kconfig
index 348aa1e14e..0abe53a10e 100644
--- a/src/mainboard/google/puff/Kconfig
+++ b/src/mainboard/google/puff/Kconfig
@@ -31,7 +31,6 @@ config BOARD_GOOGLE_BASEBOARD_PUFF
select RT8168_GET_MAC_FROM_VPD
select RT8168_SET_LED_MODE
select SOC_INTEL_COMETLAKE_1
- select SOC_INTEL_COMMON_BLOCK_DTT
select SOC_INTEL_CSE_LITE_SKU
select SPD_CACHE_IN_FMAP
select SPD_READ_BY_WORD