mb/google/puff: Use chipset dt reference names

Use the references from the chipset devicetree as this makes the
comments superfluous.

Change-Id: I06a3acca0a72ff158a0143acc87d9479b2deb0d5
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80017
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>

1 files changed, 32 insertions, 26 deletions

diff --git a/src/mainboard/google/puff/variants/scout/overridetree.cb b/src/mainboard/google/puff/variants/scout/overridetree.cb
index 5462e9b700..abf4ff3b2b 100644
--- a/src/mainboard/google/puff/variants/scout/overridetree.cb
+++ b/src/mainboard/google/puff/variants/scout/overridetree.cb
@@ -235,7 +235,7 @@ chip soc/intel/cannonlake
 	register "sata_port[1].TxGen3DeEmph" = "0x20"
 
 	device domain 0 on
-		device pci 04.0 on
+		device ref dptf on
 			chip drivers/intel/dptf
 				## Active Policy
 				register "policies.active[0]" = "{.target=DPTF_CPU,
@@ -298,8 +298,8 @@ chip soc/intel/cannonlake
 
 				device generic 0 on end
 			end
-		end # DPTF 0x1903
-		device pci 14.0 on
+		end
+		device ref xhci on
 			chip drivers/usb/acpi
 				device usb 0.0 on
 					chip drivers/usb/acpi
@@ -377,11 +377,12 @@ chip soc/intel/cannonlake
 					end
 				end
 			end
-		end # USB xHCI
-		device pci 15.0 off
+		end
+		device ref i2c0 off
 			# RFU - Reserved for Future Use.
-		end # I2C #0
-		device pci 15.1 on # I2C #1, USI (Touch screen)
+		end
+		device ref i2c1 on
+			# USI (Touch screen)
 			chip drivers/i2c/hid
 				register "generic.hid" = ""ILTK0001""
 				register "generic.desc" = ""ILITEK Touchscreen""
@@ -395,13 +396,14 @@ chip soc/intel/cannonlake
 				device i2c 41 on end
 			end
 		end
-		device pci 15.2 on end # I2C #2, SCALER
-		device pci 15.3 on end # I2C #3, TPU
-		device pci 16.0 on  end # Management Engine Interface 1
-		device pci 19.0 off end # I2C #4
-		device pci 1a.0 on end # eMMC
-		device pci 1c.6 on # PCI Root Port 7 (LAN)
-			chip drivers/net # RTL8111H Ethernet NIC
+		device ref i2c2 on end # SCALER
+		device ref i2c3 on end # TPU
+		device ref heci1 on  end
+		device ref i2c4 off end
+		device ref emmc on end
+		device ref pcie_rp7 on
+			# RTL8111H Ethernet NIC
+			chip drivers/net
 				register "customized_leds" = "0x05af"
 				register "wake" = "GPE0_DW1_07" # GPP_C7
 				register "device_index" = "0"
@@ -409,26 +411,30 @@ chip soc/intel/cannonlake
 				device pci 00.0 on end
 			end
 		end
-		device pci 1c.7 on # PCI Root Port 8 (WLAN)
+		device ref pcie_rp8 on
+			# WLAN
 			register "PcieRpSlotImplemented[7]" = "1" # M.2 Slot
 		end
-		device pci 1d.0 on # PCI Root Port 9 (SSD)
+		device ref pcie_rp9 on
+			# SSD
 			register "PcieRpSlotImplemented[8]" = "1" # M.2 Slot
 		end
-		device pci 1d.1 off end # PCI Root Port 10 (Not connected)
-		device pci 1d.2 off end # PCI Root Port 11 (Not connected)
-		device pci 1d.3 off end # PCI Root Port 12 (Not connected)
-		device pci 1d.4 on # PCI Root Port 13 (TPU0)
+		device ref pcie_rp10 off end
+		device ref pcie_rp11 off end
+		device ref pcie_rp12 off end
+		device ref pcie_rp13 on
+			# TPU0
 			register "PcieRpSlotImplemented[12]" = "1" # M.2 Slot
 		end
-		device pci 1d.5 on # PCI Root Port 14 (TPU1)
+		device ref pcie_rp14 on
+			# TPU1
 			register "PcieRpSlotImplemented[13]" = "1" # M.2 Slot
 		end
-		device pci 1d.6 on end # PCI Root Port 15 (non-root)
-		device pci 1d.7 on end # PCI Root Port 16 (non-root)
-		device pci 1e.0 on end # UART #0
-		device pci 1e.1 on end # UART #1
-		device pci 1e.3 off end # GSPI #1
+		device ref pcie_rp15 on end # non-root
+		device ref pcie_rp16 on end # non-root
+		device ref uart0 on end
+		device ref uart1 on end
+		device ref gspi1 off end
 	end
 
 	# VR Settings Configuration for 4 Domains