diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2024-01-21 20:48:26 -0600 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-02-08 23:16:22 +0000 |
| commit | 8facfa84acee18b069a6a6b53491358a7ad1017e (patch) | |
| tree | d235c2ad02298dc8d1d2233ce6a370ed19af2be4 /src/mainboard/google/puff/variants/scout | |
| parent | 3f4c830bf64ac8a0761729f831d51f0a1d6c89f4 (diff) | |
mb/google/puff/var/*: Clean up SerialIO/I2C config in overridetree
Ensure that the SerialIoDevMode config and common_soc_config registers
for each variant are programmed consistently with the devices'
enabled status in that variant's overridetree; remove and disable
extraneous devices as appropriate.
TEST=build/boot several puff variants, verify all components working
as expected, nothing missing from cbmem, lspci, etc.
Change-Id: Ib9d0cf48e405be7c00c553646651fc6f28c4e3f0
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80164
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/puff/variants/scout')
| -rw-r--r-- | src/mainboard/google/puff/variants/scout/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/puff/variants/scout/overridetree.cb b/src/mainboard/google/puff/variants/scout/overridetree.cb index a61e41bdf6..7729ccca9b 100644 --- a/src/mainboard/google/puff/variants/scout/overridetree.cb +++ b/src/mainboard/google/puff/variants/scout/overridetree.cb @@ -10,7 +10,7 @@ chip soc/intel/cannonlake [PchSerialIoIndexI2C4] = PchSerialIoDisabled, [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSPI0] = PchSerialIoPci, - [PchSerialIoIndexSPI1] = PchSerialIoPci, + [PchSerialIoIndexSPI1] = PchSerialIoDisabled, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoPci, |