diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2019-08-01 10:50:35 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-08-02 04:34:18 +0000 |
| commit | c077b2274b661fb57ffed66b105ece88e30c73b2 (patch) | |
| tree | 215148906dd7d3edf8ac1caa9c41d089959747d0 /src/mainboard/google/poppy/variants/rammus/devicetree.cb | |
| parent | 92dc39129156307913dbf3c07f926554f0c14ab8 (diff) | |
soc/intel/skylake: Make use of common thermal code for SKL
This patch ensures skylake soc is using common thermal code
from intel common block.
TEST=Build and boot soraka
Change-Id: I0812daa3536051918ccac973fde8d7f4f949609d
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34648
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/poppy/variants/rammus/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/poppy/variants/rammus/devicetree.cb | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index 1f73a5903e..70a4667e9e 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -172,6 +172,7 @@ chip soc/intel/skylake #| I2C0 | Touchscreen | #| I2C1 | Trackpad | #| I2C5 | Audio | + #| pch_thermal_trip | PCH Trip Temperature | #+-------------------+---------------------------+ register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, @@ -207,6 +208,7 @@ chip soc/intel/skylake .speed_mhz = 1, .early_init = 1, }, + .pch_thermal_trip = 75, }" # Touchscreen @@ -242,9 +244,6 @@ chip soc/intel/skylake # Use default SD card detect GPIO configuration register "sdcard_cd_gpio_default" = "GPP_E15" - # PCH Trip Temperature in degree C - register "pch_trip_temp" = "75" - device cpu_cluster 0 on device lapic 0 on end end |