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authorWerner Zeh <werner.zeh@siemens.com>2021-07-20 14:07:02 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-07-22 09:40:57 +0000
commit8dd1a54f0922a8cc600c8fc943dcb4ed5516803b (patch)
tree91156ccef0d5a733e662db30a4f455e906acf1eb /src/mainboard/google/poppy/Kconfig.name
parent3ee18cefa3e8a33720e9f62c4034f9fa76789105 (diff)
mb/siemens/mc_ehl1: Adjust PCIe settings in devicetree
This board does not use CLKREQ-signaling for PCIe, so disable the pin assignments. In addition only three clock outputs are used for PCIe, therefore disable all others to improve EMI. Change-Id: I545f890fa55a109df7f44d2c82170874fb769009 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56455 Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/poppy/Kconfig.name')
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