diff options
author | Furquan Shaikh <furquan@google.com> | 2018-11-21 14:02:59 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-27 08:49:08 +0000 |
commit | ae2cf495084325c6f4a0cb87b96167def77a80cc (patch) | |
tree | 722e97d45675194efcd5680d5ef036a8e52f9146 /src/mainboard/google/octopus/variants/yorp | |
parent | c529f5b7f242bc221ff1d638330a1bb1678f6507 (diff) |
mb/google/octopus: Update GPIO_178 in early_gpio_table in baseboard
This change updates the configuration of GPIO_178 to be active low as
per latest revision on different octopus variants. This effectively:
1. Gets rid of early_gpio_table in different variants -- phaser, meep,
fleex, bobba.
2. Deprecates board id < 2 for bobba, board id < 1 for fleex and
phaser.
3. Adds special early_gpio_table in yorp which has GPIO_178 as an
active high signal.
BUG=b:119885949
Change-Id: I024199a8f1f96db57f8fa60c4d265789cd3a0493
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/29784
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/mainboard/google/octopus/variants/yorp')
-rw-r--r-- | src/mainboard/google/octopus/variants/yorp/Makefile.inc | 1 | ||||
-rw-r--r-- | src/mainboard/google/octopus/variants/yorp/gpio.c | 53 |
2 files changed, 54 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/yorp/Makefile.inc b/src/mainboard/google/octopus/variants/yorp/Makefile.inc new file mode 100644 index 0000000000..4b48156a52 --- /dev/null +++ b/src/mainboard/google/octopus/variants/yorp/Makefile.inc @@ -0,0 +1 @@ +bootblock-y += gpio.c diff --git a/src/mainboard/google/octopus/variants/yorp/gpio.c b/src/mainboard/google/octopus/variants/yorp/gpio.c new file mode 100644 index 0000000000..571988868f --- /dev/null +++ b/src/mainboard/google/octopus/variants/yorp/gpio.c @@ -0,0 +1,53 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <gpio.h> +#include <soc/gpio.h> + +/* GPIOs needed prior to ramstage. */ +static const struct pad_config early_gpio_table[] = { + PAD_CFG_GPI(GPIO_190, NONE, DEEP), /* PCH_WP_OD */ + /* GSPI0_INT */ + PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE, + DISPUPD), /* H1_PCH_INT_ODL */ + /* GSPI0_CLK */ + PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CLK_R */ + /* GSPI0_CS# */ + PAD_CFG_NF(GPIO_80, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CS_L_R */ + /* GSPI0_MISO */ + PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MISO */ + /* GSPI0_MOSI */ + PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MOSI_R */ + + /* Enable power to wifi early in bootblock and de-assert PERST#. */ + PAD_CFG_GPO(GPIO_178, 1, DEEP), /* EN_PP3300_WLAN */ + PAD_CFG_GPO(GPIO_164, 0, DEEP), /* WLAN_PE_RST */ + + /* + * ESPI_IO1 acts as ALERT# (which is open-drain) and requies a weak + * pull-up for proper operation. Since there is no external pull present + * on this platform, configure an internal weak pull-up. + */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, UP_20K, DEEP, NF2, HIZCRx1, + ENPU), /* ESPI_IO1 */ +}; + +const struct pad_config *variant_early_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(early_gpio_table); + return early_gpio_table; +} |