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authorNico Huber <nico.h@gmx.de>2018-05-26 20:34:21 +0200
committerNico Huber <nico.h@gmx.de>2018-05-31 15:09:30 +0000
commit6197b7698875271a2b72e730040ec7e9260a454c (patch)
treee72c8e2392d0293cd8461468855cdf111424b7f9 /src/mainboard/google/octopus/Kconfig.name
parentb4953a93aa855afcf801d6f7d48df18f31ee2598 (diff)
cpu/x86/mtrr: Prepare for ROM_SIZE > 16MiB
Most, if not all, chipsets have MMIO between 0xfe000000 and 0xff000000. So don't try to cache more than 16MiB of the ROM. It's also common that at most 16MiB are memory mapped. Change-Id: I5dfa2744190a34c56c86e108a8c50dca9d428268 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26567 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/octopus/Kconfig.name')
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