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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-07-04 10:09:59 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-07-10 04:43:05 +0000 |
| commit | 6739a6a89f5b7526bddc63b16ffc519c39d788dd (patch) | |
| tree | ae1375f5a837ea10c90dca063f0f5369ea34311a /src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNN8GTMLAR-2GB.inc | |
| parent | 72d7181e4f80fb7c344337364fd665fc4c49132a (diff) | |
vboot: Fix S3 resume with stage_cache
In VBOOT_STARTS_IN_ROMSTAGE=y case, vboot_run_logic() did not
get called when postcar was loaded from TSEG stage cache on
ACPI S3 resume path. Resume failed as MP init attempts to
access microcode update from unverified FW_MAIN_A/B section.
In a similar fashion, for POSTCAR=n, loading ramstage from
TSEG stage cache would bypass the call to vboot_run_logic().
TEST=samsung/lumpy with VBOOT_STARTS_IN_ROMSTAGE=y is able
to complete S3 resume.
Change-Id: I77fe86d5fd89d22b5ef6f43e65a85a4ccd3259d9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNN8GTMLAR-2GB.inc')
0 files changed, 0 insertions, 0 deletions