diff options
author | Neil Chen <neilc@nvidia.com> | 2014-07-28 18:00:29 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-28 08:47:37 +0100 |
commit | d9becd2183da9f4174e2dc2d686ad5a66c4e4e22 (patch) | |
tree | 18279b051b94881f2e2438e77378448c275a096d /src/mainboard/google/nyan_blaze/bct/sdram-samsung-2GB-792.inc | |
parent | 4d9dc8cf50445e9e3e637edbe89daf6602dec62f (diff) |
blaze: update EMC BCT table
This change updated the EMC tables with emc_reg_tool 5.0.18,
for below memory SKUs:
- Hynix H5TC4G63AFR-PBR 2GB, ramcode = 0
- Micron MT41K256M16HA-125 2GB, ramcode = 1
- Samsung K4B4G1646Q-HYK0 2GB, ramcode = 2
- Hynix H5TC8G63AFR-PBR 4GB, ramcode = 8
- Micron MT41K512M16TNA-125 4GB, ramcode = 9
- Samsung K4B8G1646Q-MYKO 4GB, ramcode = 10
BUG=chrome-os-partner:30963
BRANCH=blaze
TEST=emerged coreboot, booted successfully into kernel.
Change-Id: Iee329ff09e35cddd3c868c0460a38ef56b2ac5bb
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 158872ff7c0dd5274cfa8d63ec17b4423a4592ce
Original-Change-Id: I44adfdb5b433e37e2d25095acdcce3d9c14eb897
Original-Signed-off-by: Neil Chen <neilc@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/210024
Original-Tested-by: Ken Chang <kenc@nvidia.com>
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Reviewed-on: http://review.coreboot.org/9116
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/nyan_blaze/bct/sdram-samsung-2GB-792.inc')
-rw-r--r-- | src/mainboard/google/nyan_blaze/bct/sdram-samsung-2GB-792.inc | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/google/nyan_blaze/bct/sdram-samsung-2GB-792.inc b/src/mainboard/google/nyan_blaze/bct/sdram-samsung-2GB-792.inc index a1728f2270..9d180cc9f1 100644 --- a/src/mainboard/google/nyan_blaze/bct/sdram-samsung-2GB-792.inc +++ b/src/mainboard/google/nyan_blaze/bct/sdram-samsung-2GB-792.inc @@ -1,4 +1,4 @@ -{ /* generated from Samsung_2GB_K4B4G1646Q_HYK0_792MHz_0502.cfg; do not edit. */ +{ /* generated from Samsung_2GB_K4B4G1646Q_HYK0_792MHz_0623_merged.cfg; do not edit. */ .MemoryType = NvBootMemoryType_Ddr3, .PllMInputDivider = 0x00000001, .PllMFeedbackDivider = 0x00000042, @@ -241,15 +241,15 @@ .EmcXm2VttGenPadCtrl3 = 0x016eeeee, .EmcAcpdControl = 0x00000000, .EmcSwizzleRank0ByteCfg = 0x00003120, - .EmcSwizzleRank0Byte0 = 0x25143067, - .EmcSwizzleRank0Byte1 = 0x45367102, - .EmcSwizzleRank0Byte2 = 0x47106253, - .EmcSwizzleRank0Byte3 = 0x04362175, + .EmcSwizzleRank0Byte0 = 0x01643752, + .EmcSwizzleRank0Byte1 = 0x34675021, + .EmcSwizzleRank0Byte2 = 0x63170254, + .EmcSwizzleRank0Byte3 = 0x14065327, .EmcSwizzleRank1ByteCfg = 0x00003120, - .EmcSwizzleRank1Byte0 = 0x71546032, - .EmcSwizzleRank1Byte1 = 0x35104276, - .EmcSwizzleRank1Byte2 = 0x27043615, - .EmcSwizzleRank1Byte3 = 0x72306145, + .EmcSwizzleRank1Byte0 = 0x73541062, + .EmcSwizzleRank1Byte1 = 0x10637254, + .EmcSwizzleRank1Byte2 = 0x62043715, + .EmcSwizzleRank1Byte3 = 0x73015624, .EmcDsrVttgenDrv = 0x0606003f, .EmcTxdsrvttgen = 0x00000000, .EmcBgbiasCtl0 = 0x00000000, @@ -301,7 +301,7 @@ .EmcCaTrainingEnable = 0x00000000, .EmcCaTrainingTimingCntl1 = 0x1f7df7df, .EmcCaTrainingTimingCntl2 = 0x0000001f, - .SwizzleRankByteEncode = 0x0000006f, + .SwizzleRankByteEncode = 0x0000000b, .BootRomPatchControl = 0x00000000, .BootRomPatchData = 0x00000000, .McMtsCarveoutBom = 0xfff00000, |