diff options
author | Matt DeVillier <matt.devillier@gmail.com> | 2018-07-07 19:03:06 -0500 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-07-21 00:49:52 +0000 |
commit | 357ea55f454a77dd5c2a9b14e5d7d5946b433146 (patch) | |
tree | d4440490f46869dddaeb620ecf975eef89869e54 /src/mainboard/google/lars/smihandler.c | |
parent | 39f3c7e1840823c294d7cedf11aed62bdd765141 (diff) |
google/lars: Convert to a variant of glados
Convert lars to a variant of glados Skylake reference board:
- add lars-specific DPTF, EC config, GPIO config, Kconfig,
NHLT config, PEI data, VBT, SPD data, and devicetree
- add conditional generation of NHLT ACPI data for Maxim codec,
including override of OEM ID and OEM table ID
- remove existing lars board/directory
Test: build/boot google/lars, verify functionality unchanged
from pre-variant configuration
Change-Id: Iab37f1b92b0f3a5d99796f916a6fdcc14ce4eef4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27413
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/lars/smihandler.c')
-rw-r--r-- | src/mainboard/google/lars/smihandler.c | 69 |
1 files changed, 0 insertions, 69 deletions
diff --git a/src/mainboard/google/lars/smihandler.c b/src/mainboard/google/lars/smihandler.c deleted file mode 100644 index 24a5b9619d..0000000000 --- a/src/mainboard/google/lars/smihandler.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008-2009 coresystems GmbH - * Copyright (C) 2015 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/acpi.h> -#include <arch/io.h> -#include <console/console.h> -#include <cpu/x86/smm.h> -#include <elog.h> -#include <ec/google/chromeec/smm.h> -#include <soc/iomap.h> -#include <soc/nvs.h> -#include <soc/pm.h> -#include <soc/smm.h> -#include "ec.h" -#include "gpio.h" - -int mainboard_io_trap_handler(int smif) -{ - switch (smif) { - case 0x99: - printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; - break; - default: - return 0; - } - - /* On success, the IO Trap Handler returns 0 - * On failure, the IO Trap Handler returns a value != 0 - * - * For now, we force the return value to 0 and log all traps to - * see what's going on. - */ - return 1; -} - -void mainboard_smi_gpi_handler(const struct gpi_status *sts) -{ - if (gpi_status_get(sts, EC_SMI_GPI)) - chromeec_smi_process_events(); -} - -void mainboard_smi_sleep(u8 slp_typ) -{ - if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)) - chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, - MAINBOARD_EC_S5_WAKE_EVENTS); -} - -int mainboard_smi_apmc(u8 apmc) -{ - if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)) - chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, - MAINBOARD_EC_SMI_EVENTS); - return 0; -} |