diff options
author | Furquan Shaikh <furquan@google.com> | 2020-07-02 13:47:43 -0700 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2020-07-05 18:33:47 +0000 |
commit | ee68b88babe604527e944224740fc2c6161cb351 (patch) | |
tree | db35af0850496f1d6fa19472bb0b674a8f12fc18 /src/mainboard/google/kahlee/variants/baseboard/include | |
parent | aff9f54e6bc50e587ec07ac0ec2b3b8e1b7136a8 (diff) |
mb/google/kahlee: Drop macro H1_PCH_INT
This change drops H1_PCH_INT macro for GPIO_9 since it is the same
across all variants. Also, the name differed from the schematics
version `H1_PCH_INT_ODL` creating confusion.
Change-Id: I7b038426a984d8abc460a0da3ee1dc5559d7ad5f
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43015
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/google/kahlee/variants/baseboard/include')
-rw-r--r-- | src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h index 6c1c9418c2..88510722c2 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h @@ -11,9 +11,6 @@ # define MEM_CONFIG2 GPIO_131 # define MEM_CONFIG3 GPIO_132 -/* CR50 interrupt pin */ -#define H1_PCH_INT GPIO_9 - /* SPI Write protect */ #define CROS_WP_GPIO GPIO_122 #define GPIO_EC_IN_RW GPIO_15 |