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authorMartin Roth <martinroth@google.com>2017-11-20 16:19:00 -0700
committerMartin Roth <martinroth@google.com>2017-12-02 03:16:25 +0000
commit38115912c924ad4c1975045859a5ab3dc2f8b28c (patch)
tree9bfd2f5052bc3644171ea91b88ea91e498f95d79 /src/mainboard/google/kahlee/variants/baseboard/include
parent0a2eb17d325f0073cfc805575b799606e570e5aa (diff)
mainboard/google/kahlee: Add Baseboard GPIOs
Add initial baseboard GPIOs based on grunt schematics. BUG=b:69305596 TEST=Build grunt Change-Id: I4efcee7dbf54fb9ea82e5e9394db805bb69203c8 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/22546 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/mainboard/google/kahlee/variants/baseboard/include')
-rw-r--r--src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h
index 5aca3e88b5..c00367312b 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h
+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h
@@ -19,19 +19,19 @@
#ifndef __ACPI__
#include <soc/gpio.h>
-# define MEM_CONFIG0 GPIO_0
-# define MEM_CONFIG1 GPIO_0
-# define MEM_CONFIG2 GPIO_0
-# define MEM_CONFIG3 GPIO_0
+# define MEM_CONFIG0 GPIO_139
+# define MEM_CONFIG1 GPIO_142
+# define MEM_CONFIG2 GPIO_131
+# define MEM_CONFIG3 GPIO_132
/* SPI Write protect */
-#define CROS_WP_GPIO GPIO_0
-#define GPIO_EC_IN_RW GPIO_0
+#define CROS_WP_GPIO GPIO_122
+#define GPIO_EC_IN_RW GPIO_15
#endif /* _ACPI__ */
-#define EC_SCI_GPI 0
+#define EC_SCI_GPI 22
-#define EC_SMI_GPI 0
+#define EC_SMI_GPI 6
#endif /* __BASEBOARD_GPIO_H__ */