diff options
| author | Martin Roth <martinroth@chromium.org> | 2018-12-04 15:16:00 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-05 14:09:17 +0000 |
| commit | 03f05cff2f9441cb20e78158e32160ec2e833350 (patch) | |
| tree | 5cb33ae522c6a2cdcb71b87913f5d61a9761516d /src/mainboard/google/kahlee/romstage.c | |
| parent | 822ffe1ef0223664a27ca560c17d3cb2a47edf36 (diff) | |
mainboard/google/kahlee: Add romstage GPIO initialization
Move the backlight initialization from bootblock to romstage
BUG=b:120436919
TEST=Careena backlight is enabled
Change-Id: Ia4993b993d37afaf9e23d6f3316ba91053732f1d
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://review.coreboot.org/c/30039
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Daniel Kurtz <djkurtz@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/mainboard/google/kahlee/romstage.c')
| -rw-r--r-- | src/mainboard/google/kahlee/romstage.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c index 5ec5c25029..32f8356521 100644 --- a/src/mainboard/google/kahlee/romstage.c +++ b/src/mainboard/google/kahlee/romstage.c @@ -15,6 +15,7 @@ #include <amdblocks/dimm_spd.h> #include <baseboard/variants.h> +#include <soc/gpio.h> #include <soc/romstage.h> int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len) @@ -29,5 +30,11 @@ void __weak variant_romstage_entry(int s3_resume) void mainboard_romstage_entry(int s3_resume) { + size_t num_gpios; + const struct soc_amd_gpio *gpios; + + gpios = variant_romstage_gpio_table(&num_gpios); + sb_program_gpios(gpios, num_gpios); + variant_romstage_entry(s3_resume); } |