diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-09 12:37:25 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-01-26 00:17:38 +0000 |
commit | 9e591c409a3e3264f54a3784b0891a7f27dd52d8 (patch) | |
tree | 80f2cbf10a4e5fff5030ee0d4704a6cc019af01c /src/mainboard/google/kahlee/romstage.c | |
parent | f9acd37d7f15290240d4fb9e365a7b79af57b925 (diff) |
soc/amd: Refactor some ACPI S3 calls
Do not pass ACPI S3 state as a parameter, by locally
calling acpi_is_wakeup_s3() compiler has better chance
for optimizing HAVE_ACPI_RESUME=n case.
Test for acpi_s3_allowed() is already included in the
implementation of acpi_is_wakeup_s3() and is removed
as redunandant.
For ramstage, acpi_is_wakeup_s3() evaluates to
romstage_handoff_if_resume().
Change-Id: I6c1e00ec3d5be9a47b9d911c73965bc0c2b17624
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49838
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/kahlee/romstage.c')
-rw-r--r-- | src/mainboard/google/kahlee/romstage.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c index 389834cd77..41a7e460df 100644 --- a/src/mainboard/google/kahlee/romstage.c +++ b/src/mainboard/google/kahlee/romstage.c @@ -1,21 +1,21 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <amdblocks/dimm_spd.h> +#include <arch/romstage.h> #include <baseboard/variants.h> #include <soc/gpio.h> -#include <soc/romstage.h> int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len) { return variant_mainboard_read_spd(spdAddress, buf, len); } -void __weak variant_romstage_entry(int s3_resume) +void __weak variant_romstage_entry(void) { /* By default, don't do anything */ } -void mainboard_romstage_entry_s3(int s3_resume) +void mainboard_romstage_entry(void) { size_t num_gpios; const struct soc_amd_gpio *gpios; @@ -23,5 +23,5 @@ void mainboard_romstage_entry_s3(int s3_resume) gpios = variant_romstage_gpio_table(&num_gpios); program_gpios(gpios, num_gpios); - variant_romstage_entry(s3_resume); + variant_romstage_entry(); } |