From 9e591c409a3e3264f54a3784b0891a7f27dd52d8 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 9 Jan 2021 12:37:25 +0200 Subject: soc/amd: Refactor some ACPI S3 calls MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do not pass ACPI S3 state as a parameter, by locally calling acpi_is_wakeup_s3() compiler has better chance for optimizing HAVE_ACPI_RESUME=n case. Test for acpi_s3_allowed() is already included in the implementation of acpi_is_wakeup_s3() and is removed as redunandant. For ramstage, acpi_is_wakeup_s3() evaluates to romstage_handoff_if_resume(). Change-Id: I6c1e00ec3d5be9a47b9d911c73965bc0c2b17624 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/49838 Reviewed-by: Felix Held Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/google/kahlee/romstage.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/mainboard/google/kahlee/romstage.c') diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c index 389834cd77..41a7e460df 100644 --- a/src/mainboard/google/kahlee/romstage.c +++ b/src/mainboard/google/kahlee/romstage.c @@ -1,21 +1,21 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include +#include #include #include -#include int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len) { return variant_mainboard_read_spd(spdAddress, buf, len); } -void __weak variant_romstage_entry(int s3_resume) +void __weak variant_romstage_entry(void) { /* By default, don't do anything */ } -void mainboard_romstage_entry_s3(int s3_resume) +void mainboard_romstage_entry(void) { size_t num_gpios; const struct soc_amd_gpio *gpios; @@ -23,5 +23,5 @@ void mainboard_romstage_entry_s3(int s3_resume) gpios = variant_romstage_gpio_table(&num_gpios); program_gpios(gpios, num_gpios); - variant_romstage_entry(s3_resume); + variant_romstage_entry(); } -- cgit v1.2.3