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| author | Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com> | 2023-09-22 10:21:37 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-09-25 14:07:10 +0000 |
| commit | 060c7c7f0618dd281fb38942916b5f9737d2b9ca (patch) | |
| tree | e056ea4e0f696879798465624081c7fbdd38ce7d /src/mainboard/google/jecht/cmos.layout | |
| parent | a6d6818f7823459eb1b66bc8e21cd3e647801385 (diff) | |
mb/google/corsola: Fine tune LCM ADC voltages
The tolerance of LCM voltage table is too small which leads to wrong
panel ID detection. Fine tune LCM ADC voltages based on hardware
calculations.
BUG=b:300418909
TEST=FW screen display normally
Signed-off-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com>
Change-Id: Id8dec043584f4c552837f70adb491584bfda7acf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78063
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Diffstat (limited to 'src/mainboard/google/jecht/cmos.layout')
0 files changed, 0 insertions, 0 deletions