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authorJes B. Klinke <jbk@chromium.org>2022-04-19 14:00:33 -0700
committerJulius Werner <jwerner@chromium.org>2022-04-21 23:07:20 +0000
commitc6b041a12e56f32be37b809357225e762b070117 (patch)
treedf09f63531c43eb3c7b8f3727d3726ccdaed035a /src/mainboard/google/herobrine
parent0b71099f6587e9722e4554c094e5ef1c32195860 (diff)
tpm: Refactor TPM Kconfig dimensions
Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of these is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk@chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/63424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/herobrine')
-rw-r--r--src/mainboard/google/herobrine/Kconfig9
-rw-r--r--src/mainboard/google/herobrine/bootblock.c4
2 files changed, 7 insertions, 6 deletions
diff --git a/src/mainboard/google/herobrine/Kconfig b/src/mainboard/google/herobrine/Kconfig
index bf66bbc46f..7c2673dbf9 100644
--- a/src/mainboard/google/herobrine/Kconfig
+++ b/src/mainboard/google/herobrine/Kconfig
@@ -25,9 +25,10 @@ config BOARD_SPECIFIC_OPTIONS
select SPI_FLASH_GIGADEVICE
select SPI_FLASH_MACRONIX
select SPI_FLASH_WINBOND
+ select TPM_GOOGLE_CR50 if !BOARD_GOOGLE_SENOR
+ select SPI_TPM if BOARD_GOOGLE_PIGLIN
+ select I2C_TPM if !BOARD_GOOGLE_PIGLIN && !BOARD_GOOGLE_SENOR
select MAINBOARD_HAS_CHROMEOS
- select MAINBOARD_HAS_SPI_TPM_CR50 if BOARD_GOOGLE_PIGLIN
- select MAINBOARD_HAS_I2C_TPM_CR50 if !BOARD_GOOGLE_PIGLIN && !BOARD_GOOGLE_SENOR
select MAINBOARD_HAS_TPM2 if !BOARD_GOOGLE_SENOR
config VBOOT
@@ -57,7 +58,7 @@ config MAINBOARD_PART_NUMBER
default "Villager" if BOARD_GOOGLE_VILLAGER
config DRIVER_TPM_I2C_BUS
- depends on MAINBOARD_HAS_I2C_TPM_CR50
+ depends on I2C_TPM
hex
default 0xC if BOARD_GOOGLE_HEROBRINE_REV0
default 0xE
@@ -66,7 +67,7 @@ config DRIVER_TPM_I2C_ADDR
default 0x50
config DRIVER_TPM_SPI_BUS
- depends on MAINBOARD_HAS_SPI_TPM_CR50
+ depends on SPI_TPM
hex
default 0xE
diff --git a/src/mainboard/google/herobrine/bootblock.c b/src/mainboard/google/herobrine/bootblock.c
index 50ca0aa4e0..cd1612703f 100644
--- a/src/mainboard/google/herobrine/bootblock.c
+++ b/src/mainboard/google/herobrine/bootblock.c
@@ -10,10 +10,10 @@ void bootblock_mainboard_init(void)
{
setup_chromeos_gpios();
- if (CONFIG(MAINBOARD_HAS_I2C_TPM_CR50))
+ if (CONFIG(I2C_TPM))
i2c_init(CONFIG_DRIVER_TPM_I2C_BUS, I2C_SPEED_FAST); /* H1/TPM I2C */
- if (CONFIG(MAINBOARD_HAS_SPI_TPM_CR50))
+ if (CONFIG(SPI_TPM))
qup_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1010 * KHz); /* H1/TPM SPI */
if (CONFIG(EC_GOOGLE_CHROMEEC))