diff options
| author | Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com> | 2022-06-14 13:03:09 +0530 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2022-08-01 18:04:54 +0000 |
| commit | 16611f31eb462312068a16ccbf66972bfb5c6262 (patch) | |
| tree | 1af38f0fae654eab1fbc3335aaaa5756aceb115a /src/mainboard/google/herobrine | |
| parent | 78298f5c8f46c6615655b2711a76b61bf8218378 (diff) | |
mb/google/herobrine: Add PCIe domain support
Add PCIe domain support for herobrine by enabling it in the devicetree.
BUG=b:182963902,b:216686574,b:181098581
TEST=Verified on Qualcomm sc7280 development board with NVMe card
(Koixa NVMe, Model-KBG40ZPZ256G with FW AEGA0102). Confirmed NVMe is
getting detected in response to 'storage init' command in depthcharge
CLI prompt.
Output logs:
->dpch: storage init
Initializing NVMe controller 1e0f:0001
Identified NVMe model KBG40ZPZ256G TOSHIBA MEMORY
Added NVMe drive "NVMe Namespace 1" lbasize:512, count:0x1dcf32b0
* 0: NVMe Namespace 1
1 devices total
Also verified NVMe boot path, that is depthcharge is able to load the
kernel image from NVMe storage.
Change-Id: Ied8fbbc8d20698ee081d93ba184b7d0291bb6a76
Signed-off-by: Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65137
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/herobrine')
| -rw-r--r-- | src/mainboard/google/herobrine/devicetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/herobrine/devicetree.cb b/src/mainboard/google/herobrine/devicetree.cb index e23782facc..34360b752a 100644 --- a/src/mainboard/google/herobrine/devicetree.cb +++ b/src/mainboard/google/herobrine/devicetree.cb @@ -2,4 +2,7 @@ chip soc/qualcomm/sc7280 device cpu_cluster 0 on end + device domain 0 on + device pci 00.0 on end + end end |