diff options
| author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2019-01-05 20:27:39 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-24 13:52:28 +0000 |
| commit | fc707892de7319cca3dc83e03034e443b2c9f9bb (patch) | |
| tree | 2b7912acd36a4aa47ee8de535ae79b7bbe5fa842 /src/mainboard/google/hatch/variants | |
| parent | 6225a677406a81990498aaf48a486a5bcad0d1fd (diff) | |
mb/google/hatch: Enable support for WWAN
This patch enables relevant GPIOs to enable WWAN. WWAN also requires to
enable USB 2 port 6 and USB3 port 5 which is already enabled in device
tree related changes.
BUG=b:120914069
BRANCH=none
TEST=check if code compiles with changes.
Change-Id: I1559bbc6168aec1a369bf3291d2c1e2f9a2fbe07
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/30678
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/hatch/variants')
| -rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/gpio.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index 3e73d95549..ade9ed21d7 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -23,6 +23,10 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_A16, DN_20K), /* EN_PP3300_SD_DX */ PAD_CFG_NF(GPP_A17, NONE, DEEP, NF1), + /* EN_PP3300_WWAN */ + PAD_CFG_GPO(GPP_A18, 1, DEEP), + /* WWAN_RADIO_DISABLE_1V8_ODL */ + PAD_CFG_GPO(GPP_A19, 1, DEEP), /* TRACKPAD_INT_ODL */ PAD_CFG_GPI_APIC(GPP_A21, NONE, PLTRST, LEVEL, INVERT), /* SRCCLKREQ1 */ @@ -47,6 +51,12 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_C11, DN_20K), /* BT_DISABLE_L */ PAD_CFG_GPO(GPP_C14, 1, DEEP), + /* WWAN_DPR_SAR_ODL + * + * TODO: Driver doesn't use this pin as of now. In case driver starts + * using this pin, expose this pin to driver. + */ + PAD_CFG_GPO(GPP_C15, 1, DEEP), /* PCH_I2C_TRACKPAD_SDA */ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* PCH_I2C_TRACKPAD_SCL */ @@ -63,6 +73,14 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPP_C22, NONE, DEEP), /* WLAN_PE_RST# */ PAD_CFG_GPO(GPP_C23, 1, DEEP), + /* WWAN_CONFIG_0 */ + PAD_NC(GPP_D5, NONE), + /* WWAN_CONFIG_1 */ + PAD_NC(GPP_D6, NONE), + /* WWAN_CONFIG_2 */ + PAD_NC(GPP_D7, NONE), + /* WWAN_CONFIG_3 */ + PAD_NC(GPP_D8, NONE), /* TOUCHSCREEN_RST_L */ PAD_CFG_GPO(GPP_D15, 0, DEEP), /* TOUCHSCREEN_INT_L */ @@ -95,6 +113,8 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_E22, DN_20K), /* GPIO_WWAN_WLAN_COEX3 */ PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1), + /* WWAN_RESET_1V8_ODL */ + PAD_CFG_GPO(GPP_F1, 1, DEEP), /* UART_WWANTX_WLANRX_COEX1 */ PAD_CFG_NF(GPP_F8, NONE, DEEP, NF1), /* UART_WWANRX_WLANTX_COEX2 */ |