diff options
| author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2020-05-09 16:37:30 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-26 15:02:54 +0000 |
| commit | 309ccf74dd7c25874572c6a62ffc7042dcdadc66 (patch) | |
| tree | 7b1e79798c0607ef794bb4cd24c575713a552db5 /src/mainboard/google/hatch/variants/puff | |
| parent | 7d054bd38f5cfe36f6abd4f4422c463243bc3749 (diff) | |
cannonlake: update processor power limits configuration
Update processor power limit configuration parameters based on
common code base support for Intel Cannonlake SoC based platforms.
BRANCH=None
BUG=None
TEST=Built and tested on drallion system
Change-Id: Iac6e6f81343fcd769619e9d7ac339430966834f6
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41235
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/hatch/variants/puff')
| -rw-r--r-- | src/mainboard/google/hatch/variants/puff/mainboard.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/mainboard/google/hatch/variants/puff/mainboard.c b/src/mainboard/google/hatch/variants/puff/mainboard.c index ef5df4ae4b..b5bc699ca0 100644 --- a/src/mainboard/google/hatch/variants/puff/mainboard.c +++ b/src/mainboard/google/hatch/variants/puff/mainboard.c @@ -6,6 +6,7 @@ #include <device/device.h> #include <ec/google/chromeec/ec.h> #include <gpio.h> +#include <intelblocks/power_limit.h> #include <timer.h> #define GPIO_HDMI_HPD GPP_E13 @@ -86,7 +87,7 @@ static void wait_for_hpd(gpio_t gpio, long timeout) #define PSYS_IMAX 9600 #define BJ_VOLTS_MV 19000 -static void mainboard_set_power_limits(config_t *conf) +static void mainboard_set_power_limits(struct soc_power_limits_config *conf) { enum usb_chg_type type; u32 watts; @@ -123,6 +124,7 @@ static void mainboard_set_power_limits(config_t *conf) void variant_ramstage_init(void) { static const long display_timeout_ms = 3000; + struct soc_power_limits_config *soc_config; config_t *conf = config_of_soc(); /* This is reconfigured back to whatever FSP-S expects by gpio_configure_pads. */ @@ -136,5 +138,6 @@ void variant_ramstage_init(void) wait_for_hpd(GPIO_DP_HPD, display_timeout_ms); } /* Psys_pmax needs to be setup before FSP-S */ - mainboard_set_power_limits(conf); + soc_config = &conf->power_limits_config; + mainboard_set_power_limits(soc_config); } |