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authorMatt DeVillier <matt.devillier@gmail.com>2022-03-28 23:19:45 -0500
committerMartin L Roth <gaumless@gmail.com>2022-12-23 00:19:06 +0000
commit525c61f74e94c1dbdf4b54ac8157d950695fc03f (patch)
treee3c51077d96a7d740a852fbd93c993c61502a1c6 /src/mainboard/google/hatch/variants/kindred/gpio.c
parentc0edb925e67b946320dbdfe1a68c4f19ca161d6e (diff)
mb/google/hatch: Implement touchscreen power sequencing
For touchscreens on hatch variants, drive the enable GPIO high starting in romstage, then disable the reset GPIO in ramstage. This will allow coreboot to detect the presence of i2c touchscreens during ACPI SSDT generation (implemented in a subsequent commit). BUG=b:121309055 TEST=tested with rest of patch train Change-Id: I86c5f41b7820eaf5252c276ae854a4206e09385f Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71059 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/hatch/variants/kindred/gpio.c')
-rw-r--r--src/mainboard/google/hatch/variants/kindred/gpio.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/kindred/gpio.c b/src/mainboard/google/hatch/variants/kindred/gpio.c
index 26740b9e9c..242c427f5b 100644
--- a/src/mainboard/google/hatch/variants/kindred/gpio.c
+++ b/src/mainboard/google/hatch/variants/kindred/gpio.c
@@ -24,6 +24,10 @@ static const struct pad_config ssd_sku_gpio_table[] = {
* using this pin, expose this pin to driver.
*/
PAD_CFG_GPO(GPP_C15, 1, DEEP),
+ /* D9 : EN_PP3300_DX_TOUCHSCREEN */
+ PAD_CFG_GPO(GPP_D9, 1, DEEP),
+ /* D15 : TOUCHSCREEN_RST_L */
+ PAD_CFG_GPO(GPP_D15, 1, DEEP),
/* F3 : MEM_STRAP_3 */
PAD_CFG_GPI(GPP_F3, NONE, PLTRST),
/* F10 : MEM_STRAP_2 */
@@ -73,6 +77,10 @@ static const struct pad_config emmc_sku_gpio_table[] = {
PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2),
/* A12 : FPMCU_RST_ODL */
PAD_CFG_GPO(GPP_A12, 0, DEEP),
+ /* D9 : EN_PP3300_DX_TOUCHSCREEN */
+ PAD_CFG_GPO(GPP_D9, 1, DEEP),
+ /* D15 : TOUCHSCREEN_RST_L */
+ PAD_CFG_GPO(GPP_D15, 1, DEEP),
/* E1 : M2_SSD_PEDET ==> NC */
PAD_NC(GPP_E1, NONE),
/* E4 : M2_SSD_PE_WAKE_ODL ==> NC */
@@ -134,6 +142,10 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2),
/* A12 : FPMCU_RST_ODL */
PAD_CFG_GPO(GPP_A12, 0, DEEP),
+ /* D9 : EN_PP3300_DX_TOUCHSCREEN */
+ PAD_CFG_GPO(GPP_D9, 1, DEEP),
+ /* D15 : TOUCHSCREEN_RST_L */
+ PAD_CFG_GPO(GPP_D15, 1, DEEP),
/* C15 : WWAN_DPR_SAR_ODL
*
* TODO: Driver doesn't use this pin as of now. In case driver starts
@@ -236,3 +248,18 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}
+
+/* GPIOs needed to be set in romstage. */
+static const struct pad_config romstage_gpio_table[] = {
+ /* Enable touchscreen, hold in reset */
+ /* D9 : EN_PP3300_DX_TOUCHSCREEN */
+ PAD_CFG_GPO(GPP_D9, 1, DEEP),
+ /* D15 : TOUCHSCREEN_RST_L */
+ PAD_CFG_GPO(GPP_D15, 0, DEEP),
+};
+
+const struct pad_config *variant_romstage_gpio_table(size_t *num)
+{
+ *num = ARRAY_SIZE(romstage_gpio_table);
+ return romstage_gpio_table;
+}