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authorWisley Chen <wisley.chen@quantatw.com>2019-11-08 23:51:00 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-11-20 13:32:08 +0000
commit3bc70228a2edbf9ee4283515307d8d44dd512192 (patch)
tree66f4b965624b808757684d2a26a67390c552c9c9 /src/mainboard/google/hatch/variants/jinlon/include
parentf2cae5085c49904b827d867dbf8d1a8b0d284c74 (diff)
/mb/google/hatch: Create jinlon variant
Create new variant for jinlon BUG=b:144150654 TEST=emerge-hatch coreboot chromeos-bootimage and boot on jinlon proto board Change-Id: I8deb29041475e38cbbf2f54519940f62b9f21822 Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36681 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/hatch/variants/jinlon/include')
-rw-r--r--src/mainboard/google/hatch/variants/jinlon/include/variant/acpi/dptf.asl16
-rw-r--r--src/mainboard/google/hatch/variants/jinlon/include/variant/ec.h21
-rw-r--r--src/mainboard/google/hatch/variants/jinlon/include/variant/gpio.h27
3 files changed, 64 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/jinlon/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/jinlon/include/variant/acpi/dptf.asl
new file mode 100644
index 0000000000..f1f09438fa
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/jinlon/include/variant/acpi/dptf.asl
@@ -0,0 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <baseboard/acpi/dptf.asl>
diff --git a/src/mainboard/google/hatch/variants/jinlon/include/variant/ec.h b/src/mainboard/google/hatch/variants/jinlon/include/variant/ec.h
new file mode 100644
index 0000000000..768987d225
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/jinlon/include/variant/ec.h
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef VARIANT_EC_H
+#define VARIANT_EC_H
+
+#include <baseboard/ec.h>
+
+#endif
diff --git a/src/mainboard/google/hatch/variants/jinlon/include/variant/gpio.h b/src/mainboard/google/hatch/variants/jinlon/include/variant/gpio.h
new file mode 100644
index 0000000000..92f9d412fd
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/jinlon/include/variant/gpio.h
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef VARIANT_GPIO_H
+#define VARIANT_GPIO_H
+
+#include <baseboard/gpio.h>
+
+/* Memory configuration board straps */
+#define GPIO_MEM_CONFIG_0 GPP_H19
+#define GPIO_MEM_CONFIG_1 GPP_H22
+#define GPIO_MEM_CONFIG_2 GPP_F10
+#define GPIO_MEM_CONFIG_3 GPP_F3
+
+#endif