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authorSubrata Banik <subrata.banik@intel.com>2019-07-30 22:01:51 +0530
committerFurquan Shaikh <furquan@google.com>2019-07-30 16:55:38 +0000
commit9d426f18f8e63a72b387af99e1d3958de32338ec (patch)
tree4af3b463c165f72135440fdb49fb3fe8b232c775 /src/mainboard/google/hatch/variants/baseboard
parent990a05d26123dc9bfa5e802ac66e1482d0c06f8a (diff)
mb/google/hatch: Enable chipset_lockdown coreboot config for hatch
This patch enables lockdown configuration for hatch family (hatch, kindred, helios and kohaku) BUG=b:138200201 Change-Id: Ia6dc90156dc76fde490b25cf833da3cf80f664f2 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34514 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/hatch/variants/baseboard')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index 6ff90f8d9d..6f4adc4e14 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -179,6 +179,12 @@ chip soc/intel/cannonlake
register "gpio_pm[COMM_3]" = "0"
register "gpio_pm[COMM_4]" = "0"
+ # chipset_lockdown configuration
+ # Use below format to override value in overridetree.cb if required
+ # format:
+ # register "common_soc_config.<variable_name>" = "value"
+ register "common_soc_config.chipset_lockdown" = CHIPSET_LOCKDOWN_COREBOOT
+
device cpu_cluster 0 on
device lapic 0 on end
end