diff options
| author | Shelley Chen <shchen@google.com> | 2018-12-18 13:11:25 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-22 12:14:20 +0000 |
| commit | 6bb563f29c5620746411e4766ac03113ec8b8280 (patch) | |
| tree | 45ff7e8cbe185ecb123145a92afee51a78b43eb3 /src/mainboard/google/hatch/Kconfig | |
| parent | 74e0390e7487fc531d95cffe7736ab8b5512062a (diff) | |
mb/google/hatch: Fixes to initial hatch mainboard checkin
Incorporating some feedback to initial hatch mainboard checking
(CL:30169) that came in after the CL merged.
Updated the chromeos.fmd with the following,
* SI_ALL = 3MB
* SI_BIOS = 16MB
BUG=b:20914069
BRANCH=None
TEST=./util/abuild/abuild -p none -t google/hatch -x -a -v
Change-Id: I4e311c68873f10f71314e44d3a714639a06dbee8
Signed-off-by: Shelley Chen <shchen@google.com>
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/30296
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/hatch/Kconfig')
| -rw-r--r-- | src/mainboard/google/hatch/Kconfig | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 1c0208ff68..24002022b6 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -23,10 +23,14 @@ if BOARD_GOOGLE_BASEBOARD_HATCH config CHROMEOS bool default y + select EC_GOOGLE_CHROMEEC_SWITCHES select GBB_FLAG_FORCE_DEV_SWITCH_ON select GBB_FLAG_FORCE_DEV_BOOT_USB select GBB_FLAG_FORCE_DEV_BOOT_LEGACY select GBB_FLAG_FORCE_MANUAL_RECOVERY + select HAS_RECOVERY_MRC_CACHE + select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN + select VBOOT_LID_SWITCH config DEVICETREE string @@ -68,10 +72,6 @@ config MAX_CPUS int default 8 -config OVERRIDE_DEVICETREE - string - default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" if !BOARD_GOOGLE_HATCH - config TPM_TIS_ACPI_INTERRUPT int default 53 # GPE0_DW1_21 (GPP_C21) |