diff options
| author | Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com> | 2022-06-22 09:46:14 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-23 12:18:17 +0000 |
| commit | f304dc2dce8699940f2fedbe97e208a6cd2e27b7 (patch) | |
| tree | 0e5e59980618f75331bf2a9d833d321c8f6fceed /src/mainboard/google/guybrush | |
| parent | 0424a2c59fb28201494aa97a17f873c23645ddfd (diff) | |
mb/google/guybrush/var/dewatt: Update telemetry value
AMD SDLE testing had been done.
Apply the following telemetry settings for dewatt DVT:
vdd scale: 91573
vdd offset: 620
soc scale: 30829
soc offset: 235
BUG=b:234417498
TEST=1. emerge-guybrush coreboot
2. pass AMD SDLE test
Change-Id: I46650ca12ccfec90f15ee562d30c62c389d14d39
Signed-off-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65304
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Diffstat (limited to 'src/mainboard/google/guybrush')
| -rw-r--r-- | src/mainboard/google/guybrush/variants/dewatt/overridetree.cb | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb index 84bf9da25a..e5e63ab433 100644 --- a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb @@ -22,10 +22,10 @@ chip soc/amd/cezanne register "thermctl_limit_degreeC" = "100" #Update values based on final stardust SDLE test report. - register "telemetry_vddcrvddfull_scale_current_mA" = "91288" #mA - register "telemetry_vddcrvddoffset" = "279" - register "telemetry_vddcrsocfull_scale_current_mA" = "29785" #mA - register "telemetry_vddcrsocoffset" = "461" + register "telemetry_vddcrvddfull_scale_current_mA" = "91573" #mA + register "telemetry_vddcrvddoffset" = "620" + register "telemetry_vddcrsocfull_scale_current_mA" = "30829" #mA + register "telemetry_vddcrsocoffset" = "235" # Enable STT support register "stt_control" = "1" |