diff options
| author | Rob Barnes <robbarnes@google.com> | 2021-11-09 13:21:28 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-18 23:33:15 +0000 |
| commit | 188be6b27008c4ca400b004c2a82127383dd318e (patch) | |
| tree | ccb735f798f6f7c5e7125123232604e6e122d819 /src/mainboard/google/guybrush/variants/nipperkin | |
| parent | eae7bf2327f7f1fab7c0177e5ee2116b624a92a9 (diff) | |
mb/google/guybrush: Add variant_tpm_gpio_table
Add separate gpio table for TPM i2c and interrupt. Remove TPM gpios from
early_gpio_table. This allows for initializing TPM gpios separately from
other gpios.
BUG=b:200578885
BRANCH=None
TEST=Build and boot guybrush
Change-Id: I51d087087b166ec3bb3762bc1150b34db5b22f2f
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59083
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/guybrush/variants/nipperkin')
| -rw-r--r-- | src/mainboard/google/guybrush/variants/nipperkin/gpio.c | 36 |
1 files changed, 34 insertions, 2 deletions
diff --git a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c index a2a0e93f46..00fd9642fd 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c +++ b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c @@ -39,8 +39,6 @@ static const struct soc_amd_gpio bid2_override_gpio_table[] = { }; static const struct soc_amd_gpio override_early_gpio_table[] = { - /* BID == 1: GSC_SOC_INT_L, BID > 1: Unused */ - PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), PAD_NC(GPIO_18), }; @@ -48,6 +46,27 @@ static const struct soc_amd_gpio override_pcie_gpio_table[] = { PAD_NC(GPIO_18), }; + +/* This table is used by nipperkin variant with board version < 2. */ +static const struct soc_amd_gpio bid1_tpm_gpio_table[] = { + /* I2C3_SCL */ + PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE), + /* I2C3_SDA */ + PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE), + /* GSC_SOC_INT_L */ + PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), +}; + +/* This table is used by nipperkin variant with board version >= 2. */ +static const struct soc_amd_gpio bid2_tpm_gpio_table[] = { + /* I2C3_SCL */ + PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE), + /* I2C3_SDA */ + PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE), + /* GSC_SOC_INT_L */ + PAD_INT(GPIO_85, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), +}; + const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) { uint32_t board_version = board_id(); @@ -72,3 +91,16 @@ const struct soc_amd_gpio *variant_pcie_override_gpio_table(size_t *size) *size = ARRAY_SIZE(override_pcie_gpio_table); return override_pcie_gpio_table; } + +const struct soc_amd_gpio *variant_tpm_gpio_table(size_t *size) +{ + uint32_t board_version = board_id(); + + if (board_version < 2) { + *size = ARRAY_SIZE(bid1_tpm_gpio_table); + return bid1_tpm_gpio_table; + } + + *size = ARRAY_SIZE(bid2_tpm_gpio_table); + return bid2_tpm_gpio_table; +} |