diff options
| author | Karthikeyan Ramasubramanian <kramasub@chromium.org> | 2021-10-25 20:48:56 -0600 |
|---|---|---|
| committer | Raul Rangel <rrangel@chromium.org> | 2021-10-27 21:59:37 +0000 |
| commit | d125566582fd0902735bf963df777b1bc6faba1e (patch) | |
| tree | 78802190dcb0e97181eeb1492cd3552c829d6c36 /src/mainboard/google/guybrush/variants/guybrush | |
| parent | d687d8dc68b2eba301a17e0367dba67f8f999b17 (diff) | |
mb/google/guybrush: Reconfigure GPIO_5
On Guybrush, pen is stuffed and GPIO_5 is used to enable Pen power. On
Nipperkin board version 1, pen is not stuffed and instead the GPIO is
used to control LCD Privacy settings. On upcoming Nipperkin board
versions and other variants, GPIO_5 is not used. Configure GPIO_5
accordingly.
BUG=b:202992077
TEST=Build and boot to OS in Guybrush. Ensure that the configuration is
retained on existing boards.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I2aa2f16282b91f157701212ee27ddd2e89918767
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Diffstat (limited to 'src/mainboard/google/guybrush/variants/guybrush')
| -rw-r--r-- | src/mainboard/google/guybrush/variants/guybrush/gpio.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/mainboard/google/guybrush/variants/guybrush/gpio.c b/src/mainboard/google/guybrush/variants/guybrush/gpio.c index 08289c8bc9..fa3a8226f9 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/gpio.c +++ b/src/mainboard/google/guybrush/variants/guybrush/gpio.c @@ -17,6 +17,14 @@ static const struct soc_amd_gpio bid1_ramstage_gpio_table[] = { PAD_GPO(GPIO_70, HIGH), /* RAM_ID_CHAN_SEL */ PAD_GPI(GPIO_74, PULL_NONE), + /* EN_PP5000_PEN */ + PAD_GPO(GPIO_5, HIGH), +}; + +/* This table is used by guybrush variant with board version >= 2. */ +static const struct soc_amd_gpio bid2_ramstage_gpio_table[] = { + /* EN_PP5000_PEN */ + PAD_GPO(GPIO_5, HIGH), }; /* This table is used by guybrush variant with board version < 2. */ @@ -42,7 +50,8 @@ const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) return bid1_ramstage_gpio_table; } - return NULL; + *size = ARRAY_SIZE(bid2_ramstage_gpio_table); + return bid2_ramstage_gpio_table; } const struct soc_amd_gpio *variant_early_override_gpio_table(size_t *size) |