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authorWon Chung <wonchung@google.com>2022-06-01 17:05:52 +0000
committerFelix Held <felix-coreboot@felixheld.de>2022-06-07 12:46:32 +0000
commit749f5bd333e34a61d1ea09d8f3b2fd8feb172f6b (patch)
tree0f427429db7fa28f5171aceb4535707135d35eb0 /src/mainboard/google/guybrush/variants/baseboard
parentb344b3c2c66ba0bb5a24a9ebcbd5777bdddeb248 (diff)
mb/google/guybrush: Add ACPI _PLD custom values
This patch uses ACPI _PLD macros to add custom values for USB ports. +----------------+ | | | Screen | | | +----------------+ C0 | | C1 A0 | MLB DB | A1 | | +----------------+ BUG=b:232298307 TEST=None Signed-off-by: Won Chung <wonchung@google.com> Change-Id: Ic9c45aebaf02a16b755f4731e1e3b46cd5dec829 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64876 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google/guybrush/variants/baseboard')
-rw-r--r--src/mainboard/google/guybrush/variants/baseboard/devicetree.cb24
1 files changed, 16 insertions, 8 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
index 0b69af9f9b..a8c98907a5 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
@@ -252,25 +252,29 @@ chip soc/amd/cezanne
chip drivers/usb/acpi
register "desc" = ""Left Type-C Port""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb3_port0 on end
end
chip drivers/usb/acpi
register "desc" = ""Left Type-A Port""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(1, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(1, 2))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""Left Type-C Port""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port0 on end
end
chip drivers/usb/acpi
register "desc" = ""Left Type-A Port""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(1, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(1, 2))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
@@ -292,25 +296,29 @@ chip soc/amd/cezanne
chip drivers/usb/acpi
register "desc" = ""Right Type-C Port""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 2))"
device ref usb3_port4 on end
end
chip drivers/usb/acpi
register "desc" = ""Right Type-A Port""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb3_port5 on end
end
chip drivers/usb/acpi
register "desc" = ""Right Type-C Port""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 2))"
device ref usb2_port4 on end
end
chip drivers/usb/acpi
register "desc" = ""Right Type-A Port""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port5 on end
end
chip drivers/usb/acpi