diff options
| author | Rob Barnes <robbarnes@google.com> | 2021-11-09 10:34:10 -0700 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2021-11-16 00:36:02 +0000 |
| commit | da0c4f42f608a94014ccf51df5b04a6a86e4315f (patch) | |
| tree | 17ac40e1db38abf1c34bd2f58aff41377f8dd22c /src/mainboard/google/guybrush/variants/baseboard/gpio.c | |
| parent | aba1c13581595bdcc38c6d38d0e6613e632035a3 (diff) | |
mb/google/guybrush: Make GPIO_69 default for SD_AUX_RESET_L
In CL:3248796 GPIO_5 was made the default for SD_AUX_RESET_L. No variant
is actually using GPIO_5 for SD_AUX_RESET_L. Making GPIO_69 the default
and only overriding to GPIO_70 for guybrush bid==1.
BUG=b:202992077
BRANCH=None
TEST=Build and boot guybrush, SD card works
Change-Id: I6546ad9961f6f7146aa3aefc35d39a2eb282a252
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59053
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/guybrush/variants/baseboard/gpio.c')
| -rw-r--r-- | src/mainboard/google/guybrush/variants/baseboard/gpio.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/gpio.c b/src/mainboard/google/guybrush/variants/baseboard/gpio.c index 6b8c2b7caa..82956dc3e6 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/gpio.c +++ b/src/mainboard/google/guybrush/variants/baseboard/gpio.c @@ -21,8 +21,8 @@ static const struct soc_amd_gpio base_gpio_table[] = { PAD_GPO(GPIO_3, LOW), /* SOC_PEN_DETECT_ODL */ PAD_WAKE(GPIO_4, PULL_NONE, EDGE_HIGH, S0i3), - /* SD_AUX_RESET_L */ - PAD_GPO(GPIO_5, HIGH), + /* Unused */ + PAD_NC(GPIO_5), /* EN_PP3300_WLAN */ PAD_GPO(GPIO_6, HIGH), /* EN_PP3300_TCHPAD */ @@ -81,8 +81,8 @@ static const struct soc_amd_gpio base_gpio_table[] = { PAD_GPI(GPIO_67, PULL_NONE), /* EN_PP3300_TCHSCR */ PAD_GPO(GPIO_68, HIGH), - /* Unused */ - PAD_NC(GPIO_69), + /* SD_AUX_RESET_L */ + PAD_GPO(GPIO_69, HIGH), /* Unused TP27 */ PAD_NC(GPIO_70), /* GPIO_71 - GPIO_73: Not available */ @@ -170,16 +170,16 @@ static const struct soc_amd_gpio base_gpio_table[] = { /* Early GPIO configuration */ static const struct soc_amd_gpio early_gpio_table[] = { /* Assert all AUX reset lines */ - /* SD_AUX_RESET_L */ - PAD_GPO(GPIO_5, LOW), + /* Unused */ + PAD_NC(GPIO_5), /* WWAN_AUX_RESET_L */ PAD_GPO(GPIO_18, LOW), /* WLAN_AUX_RESET (ACTIVE HIGH) */ PAD_GPO(GPIO_29, HIGH), /* SSD_AUX_RESET_L */ PAD_GPO(GPIO_40, LOW), - /* Guybrush BID >= 2: SD_AUX_RESET_L, Other variants: Unused */ - PAD_NC(GPIO_69), + /* SD_AUX_RESET_L */ + PAD_GPO(GPIO_69, LOW), /* Guybrush BID>1, Other variants : Unused TP27; BID==1: SD_AUX_RESET_L */ PAD_NC(GPIO_70), @@ -278,16 +278,16 @@ static const struct soc_amd_gpio sleep_gpio_table[] = { /* PCIE_RST needs to be brought high before FSP-M runs */ static const struct soc_amd_gpio pcie_gpio_table[] = { /* Deassert all AUX_RESET lines & PCIE_RST */ - /* SD_AUX_RESET_L */ - PAD_GPO(GPIO_5, HIGH), + /* Unused */ + PAD_NC(GPIO_5), /* WWAN_AUX_RESET_L */ PAD_GPO(GPIO_18, HIGH), /* WLAN_AUX_RESET (ACTIVE HIGH) */ PAD_GPO(GPIO_29, LOW), /* SSD_AUX_RESET_L */ PAD_GPO(GPIO_40, HIGH), - /* Guybrush BID >= 2: SD_AUX_RESET_L, Other variants: Unused */ - PAD_NC(GPIO_69), + /* SD_AUX_RESET_L */ + PAD_GPO(GPIO_69, HIGH), /* Guybrush BID>1, Other variants : Unused TP27; BID==1: SD_AUX_RESET_L */ PAD_NC(GPIO_70), /* PCIE_RST0_L */ |