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authorKarthikeyan Ramasubramanian <kramasub@chromium.org>2021-03-15 10:31:37 -0600
committerMartin Roth <martinroth@google.com>2021-03-22 03:50:08 +0000
commit8f7fca53709e7ddd81efece6906d3bd019e878c0 (patch)
treefe633ee9ecda0a2f111b2d6d64a4155187c48c97 /src/mainboard/google/guybrush/Kconfig
parent699a709bdcee250136a8b5f7af13a6d534598f1d (diff)
mb/google/guybrush: Enable AP <-> H1 communication
Configure H1 I2C and Interrupt GPIOs during the early initialization. Add devicetree configuration for H1 device and enable the required config items. BUG=b:180528902 TEST=Build Guybrush mainboard. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I040a5e6101bab0c7425d7b6cc6fbed3b479a5a44 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51544 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/guybrush/Kconfig')
-rw-r--r--src/mainboard/google/guybrush/Kconfig10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig
index 77e4a195af..5645c1750b 100644
--- a/src/mainboard/google/guybrush/Kconfig
+++ b/src/mainboard/google/guybrush/Kconfig
@@ -22,6 +22,8 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_EM100_SUPPORT
select HAVE_SPD_IN_CBFS
select MAINBOARD_HAS_CHROMEOS
+ select MAINBOARD_HAS_I2C_TPM_CR50
+ select MAINBOARD_HAS_TPM2
select SOC_AMD_CEZANNE
select SOC_AMD_COMMON_BLOCK_USE_ESPI
@@ -50,6 +52,14 @@ config AMD_FWM_POSITION_INDEX
help
TODO: might need to be adapted for better placement of files in cbfs
+config DRIVER_TPM_I2C_BUS
+ hex
+ default 0x03
+
+config DRIVER_TPM_I2C_ADDR
+ hex
+ default 0x50
+
config EFS_SPI_READ_MODE
int
default 0 if EM100 # Normal read mode