diff options
author | Shasha Zhao <Sarah_Zhao@asus.com> | 2016-11-14 20:10:55 +0800 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-12-06 21:56:34 +0100 |
commit | 6bd75ec94204719f30f4aed22cc7460d6250e9aa (patch) | |
tree | 41635d9b1a168d1b9c6a024919f25f3abbe142c7 /src/mainboard/google/gru/sdram_configs.c | |
parent | f00af5833abd0792429ffb28c551eedb7b59aafc (diff) |
Bob: add bob in coreboot
Add bob in coreboot and update as necessary.
1. Add bob HWID
2. Add supported memory source
BUG=chrome-os-partner:59454
BRANCH=firmware-gru-8785.B
TEST=Build firmware passed
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Change-Id: Iad03a293bdbbb89450f0fea0822e34a4be7064bf
Original-Commit-Id: bff788c71a43403bff2c23b38e69cc27fb869559
Original-Change-Id: I0dcf47eb911337b176f73759a2c70a9dbf4dc68b
Original-Signed-off-by: Shasha Zhao <Sarah_Zhao@asus.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/411083
Original-Reviewed-by: Philip Chen <philipchen@chromium.org>
Original-(cherry picked from commit c5925dfcf59ac755a26182744b2bde59e41a37cf)
Original-Reviewed-on: https://chromium-review.googlesource.com/413744
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/17678
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/gru/sdram_configs.c')
-rw-r--r-- | src/mainboard/google/gru/sdram_configs.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/mainboard/google/gru/sdram_configs.c b/src/mainboard/google/gru/sdram_configs.c index aeb355e986..1cfef06189 100644 --- a/src/mainboard/google/gru/sdram_configs.c +++ b/src/mainboard/google/gru/sdram_configs.c @@ -23,13 +23,22 @@ #include <types.h> static const char *sdram_configs[] = { +#if IS_ENABLED(CONFIG_BOARD_GOOGLE_BOB) + "sdram-lpddr3-samsung-2GB-24EB", + "sdram-lpddr3-micron-2GB", + "sdram-lpddr3-samsung-4GB-04EB", + "sdram-lpddr3-micron-4GB", +#else "sdram-lpddr3-hynix-4GB-666", "sdram-lpddr3-hynix-4GB-800", "sdram-lpddr3-hynix-4GB-933", +#endif }; static struct rk3399_sdram_params params; +#if IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU) || \ + IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN) enum dram_speeds { dram_666MHz = 0, dram_800MHz = 1, @@ -53,11 +62,28 @@ static enum dram_speeds get_sdram_index(void) if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU)) return dram_800MHz; } +#endif const struct rk3399_sdram_params *get_sdram_config() { +#if IS_ENABLED(CONFIG_BOARD_GOOGLE_BOB) + u32 ramcode = ram_code(); + + /* + * through schematic, ramid arrange like following: + * 0: sdram-lpddr3-samsung-2GB-24EB + * 2: sdram-lpddr3-micron-2GB + * 4: sdram-lpddr3-samsung-4GB-04EB + * 6: sdram-lpddr3-micron-4GB + */ + ramcode = ramcode / 2; + + if (cbfs_boot_load_struct(sdram_configs[ramcode], + ¶ms, sizeof(params)) != sizeof(params)) +#else if (cbfs_boot_load_struct(sdram_configs[get_sdram_index()], ¶ms, sizeof(params)) != sizeof(params)) +#endif die("Cannot load SDRAM parameter file!"); return ¶ms; } |