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author | Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com> | 2018-04-09 11:14:42 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-17 10:44:47 +0000 |
commit | 79f1c3e2a5c28e7d6b308165428c15188419d1a3 (patch) | |
tree | c5213c7452f594e34a1fc74dce5795f01075d60a /src/mainboard/google/gru/reset.c | |
parent | f03c63ef956b53c691567e0bc3a4b61357155755 (diff) |
soc/intel/apollolake: Implement _PS0/_PS3 methods for PCIe root ports
Creates a common asl include file for PCIe power state methods. This
allows ports to be enabled independently.
BUG=None
BRANCH=None
TEST=None
Change-Id: I7b1cf4e14ebdfe9ecc7131dfe47c70ed7e2c3dc5
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Reviewed-on: https://review.coreboot.org/25532
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/gru/reset.c')
0 files changed, 0 insertions, 0 deletions