diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-02 18:28:22 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-13 17:32:37 +0000 |
| commit | a1843d8411d3caebd0600421c2b6a4c6b0588c19 (patch) | |
| tree | d1baeb97ea1ca28ca09df0ceb3edd53ef0eea029 /src/mainboard/google/glados | |
| parent | 8a64ad09a100adf478d65e42e4cc10a18ccc2d16 (diff) | |
soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig
Select `PM_ACPI_TIMER_OPTIONAL` to enable the new PM ACPI Kconfig and
set the FSP option for PM ACPI timer enablement from its value instead
of using the old devicetree option.
Also drop the obsolete devicetree option from soc code and from the
mainboards and add a corresponding Kconfig entry instead.
Change-Id: I10724ccf1647594404cec15c2349ab05b6c9714f
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45955
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/glados')
| -rw-r--r-- | src/mainboard/google/glados/Kconfig | 3 | ||||
| -rw-r--r-- | src/mainboard/google/glados/devicetree.cb | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/google/glados/Kconfig b/src/mainboard/google/glados/Kconfig index 50e56ce9e7..144fe97b8b 100644 --- a/src/mainboard/google/glados/Kconfig +++ b/src/mainboard/google/glados/Kconfig @@ -86,4 +86,7 @@ config CONSOLE_SERIAL bool default n +config USE_PM_ACPI_TIMER + default n + endif diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index 2dfb71f2c0..ba3f204d09 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -50,7 +50,6 @@ chip soc/intel/skylake register "PmConfigSlpS4MinAssert" = "4" # 4s register "PmConfigSlpSusMinAssert" = "3" # 4s register "PmConfigSlpAMinAssert" = "3" # 2s - register "PmTimerDisabled" = "1" # Enable Root port 1 register "PcieRpEnable[0]" = "1" |