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authorSukumar Ghorai <sukumar.ghorai@intel.com>2024-11-01 11:23:59 -0700
committerSubrata Banik <subratabanik@google.com>2024-11-04 18:13:47 +0000
commit4953648253598ff5ebeeaf38fa4f3a23fd8b0e97 (patch)
treebf6ff361a054372461d65c419621d76c5efa99b2 /src/mainboard/google/fatcat
parentdbe5ba8485be8808933cc38c0e207d93f543795a (diff)
mb/google/fatcat/var/fatcat: Configure eSPI alarm GPIO
This patch configures the ESPI_SOC_ALERT_L GPIO pad on fatcat as NC to enable S0ix low power entry. TEST=Build fatcat and check the platform boots without an issue. Change-Id: Icb80a56177105c0281d05fe1f5daa87e6f7e291f Signed-off-by: Sukumar Ghorai <sukumar.ghorai@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84957 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Diffstat (limited to 'src/mainboard/google/fatcat')
-rw-r--r--src/mainboard/google/fatcat/variants/fatcat/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/fatcat/variants/fatcat/gpio.c b/src/mainboard/google/fatcat/variants/fatcat/gpio.c
index ca594465da..b76db5a92a 100644
--- a/src/mainboard/google/fatcat/variants/fatcat/gpio.c
+++ b/src/mainboard/google/fatcat/variants/fatcat/gpio.c
@@ -100,7 +100,7 @@ static const struct pad_config gpio_table[] = {
/* GPP_B23: ISH_GP_6_SNSR_HDR */
PAD_CFG_NF(GPP_B23, NONE, DEEP, NF4),
/* GPP_B24: ESPI_ALERT0_EC_R_N */
- PAD_CFG_NF(GPP_B24, NONE, DEEP, NF1),
+ PAD_NC(GPP_B24, NONE),
/* GPP_B25: X1_SLOT_WAKE_N */
PAD_CFG_GPI_SCI_LOW(GPP_B25, NONE, DEEP, LEVEL),