diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2016-11-27 02:21:07 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-12-05 19:06:21 +0100 |
| commit | b5a74d6ca21139ddcb9a613f810338b6e97f27b9 (patch) | |
| tree | 1bcf4a9055a7b3d62af57b0b672005af79978d06 /src/mainboard/google/falco/dsdt.asl | |
| parent | e4b9af15d8775b602020ccadbfc138378fbc7c1e (diff) | |
Remove boards google/falco and google/peppy
No need for these boards to exist separately once included as
variants under google/slippy
Change-Id: I52a476ceaadf50487d6fe21e796d7844f946d8b3
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/17622
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/google/falco/dsdt.asl')
| -rw-r--r-- | src/mainboard/google/falco/dsdt.asl | 61 |
1 files changed, 0 insertions, 61 deletions
diff --git a/src/mainboard/google/falco/dsdt.asl b/src/mainboard/google/falco/dsdt.asl deleted file mode 100644 index f4a462757d..0000000000 --- a/src/mainboard/google/falco/dsdt.asl +++ /dev/null @@ -1,61 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * Copyright (C) 2012 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#define ENABLE_TPM - -DefinitionBlock( - "dsdt.aml", - "DSDT", - 0x02, // DSDT revision: ACPI v2.0 - "COREv4", // OEM id - "COREBOOT", // OEM table id - 0x20110725 // OEM revision -) -{ - // Some generic macros - #include "acpi/platform.asl" - - // global NVS and variables - #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> - - // General Purpose Events - //#include "acpi/gpe.asl" - - // CPU - #include <cpu/intel/haswell/acpi/cpu.asl> - - Scope (\_SB) { - Device (PCI0) - { - #include <northbridge/intel/haswell/acpi/haswell.asl> - #include <southbridge/intel/lynxpoint/acpi/pch.asl> - - #include <drivers/intel/gma/acpi/default_brightness_levels.asl> - } - } - - // Mainboard specific - #include "acpi/mainboard.asl" - - // Thermal handler - #include "acpi/thermal.asl" - - // Chrome OS specific - #include <vendorcode/google/chromeos/acpi/chromeos.asl> - - // Chipset specific sleep states - #include <southbridge/intel/lynxpoint/acpi/sleepstates.asl> -} |