falco: Initial mainboard commit

- Only the first two DIMM SPDs are specified so far
- GPIO map is updated
- iSSD power sequencing removed
- USB port map updated

Change-Id: I4172460d3b075bfd5bb22013a6225cf0e8f95b9c
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56329
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4184
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

1 files changed, 51 insertions, 0 deletions

diff --git a/src/mainboard/google/falco/Kconfig b/src/mainboard/google/falco/Kconfig
new file mode 100644
index 0000000000..068e7f1d50
--- /dev/null
+++ b/src/mainboard/google/falco/Kconfig
@@ -0,0 +1,51 @@
+if BOARD_GOOGLE_FALCO
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select ARCH_X86
+	select CPU_INTEL_SOCKET_RPGA989
+	select NORTHBRIDGE_INTEL_HASWELL
+	select SOUTHBRIDGE_INTEL_LYNXPOINT
+	select INTEL_LYNXPOINT_LP
+	select BOARD_ROMSIZE_KB_8192
+	select EC_GOOGLE_CHROMEEC
+	select HAVE_ACPI_TABLES
+	select HAVE_OPTION_TABLE
+	select HAVE_ACPI_RESUME
+	select MMCONF_SUPPORT
+	select HAVE_SMI_HANDLER
+	select CHROMEOS
+	select EXTERNAL_MRC_BLOB
+	select CACHE_ROM
+	select MARK_GRAPHICS_MEM_WRCOMB
+	select MONOTONIC_TIMER_MSR
+
+config VBOOT_RAMSTAGE_INDEX
+	hex
+	default 0x2
+
+config MAINBOARD_DIR
+	string
+	default google/falco
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "Falco"
+
+config MMCONF_BASE_ADDRESS
+	hex
+	default 0xf0000000
+
+config IRQ_SLOT_COUNT
+	int
+	default 18
+
+config MAX_CPUS
+	int
+	default 8
+
+config VGA_BIOS_FILE
+	string
+	default "pci8086,0166.rom"
+
+endif