diff options
author | Matt DeVillier <matt.devillier@gmail.com> | 2016-06-02 17:58:18 -0500 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2016-09-21 13:59:55 +0200 |
commit | 1ba34323010f075e21ed11d9cf2c97e688441676 (patch) | |
tree | 12d98710a605745690c58f4adf3635fef5e6bcf0 /src/mainboard/google/enguarde/acpi/mainboard.asl | |
parent | 776498ac7ec537bab2a65101fd9640c1a7679f51 (diff) |
google/enguarde: Upstream Lenovo N21 Chromebook
Migrate google/enguarde (Lenovo N21 Chromebook) from Chromium tree to
upstream, using google/rambi as a reference.
original source:
branch firmware-enguarde-5216.201.B
commit cf1f57b [Enguarde: Adjust rx delay for norm.]
TEST=built and booted Linux on enguarde with full functionality
blobs required for working image:
VGA BIOS (vgabios.bin)
firmware descriptor (ifd.bin)
Intel ME firmware (me.bin)
MRC (mrc.elf)
external reference code (refcode.elf)
Change-Id: I3ccda29d1e095d8b1b36766cda913172f72233a7
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/15444
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/google/enguarde/acpi/mainboard.asl')
-rw-r--r-- | src/mainboard/google/enguarde/acpi/mainboard.asl | 266 |
1 files changed, 266 insertions, 0 deletions
diff --git a/src/mainboard/google/enguarde/acpi/mainboard.asl b/src/mainboard/google/enguarde/acpi/mainboard.asl new file mode 100644 index 0000000000..01868e4f4d --- /dev/null +++ b/src/mainboard/google/enguarde/acpi/mainboard.asl @@ -0,0 +1,266 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <mainboard/google/enguarde/onboard.h> + +Scope (\_SB) +{ + Device (LID0) + { + Name (_HID, EisaId ("PNP0C0D")) + Name (_PRW, Package() { BOARD_PCH_WAKE_GPIO, 0x5 }) + Method (_LID, 0) + { + Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS) + Return (\LIDS) + } + } + + Device (PWRB) + { + Name (_HID, EisaId ("PNP0C0C")) + Name (_UID, 1) + } + + /* Wake device for touchpad */ + Device (TPAD) + { + Name (_HID, EisaId ("PNP0C0E")) + Name (_UID, 1) + Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 }) + + Name (RBUF, ResourceTemplate() + { + Interrupt (ResourceConsumer, Edge, ActiveLow) + { + BOARD_TRACKPAD_IRQ + } + }) + + Method (_CRS) + { + /* Return interrupt if I2C1 is PCI mode */ + If (LEqual (\S1EN, 0)) { + Return (^RBUF) + } + + /* Return empty resource template otherwise */ + Return (ResourceTemplate() {}) + } + } +} + +Scope (\_SB.I2C1) +{ + Device (ATPB) + { + Name (_HID, "ATML0000") + Name (_DDN, "Atmel Touchpad Bootloader") + Name (_UID, 1) + Name (ISTP, 1) /* Touchpad */ + + Name (_CRS, ResourceTemplate() + { + I2cSerialBus ( + 0x25, // SlaveAddress + ControllerInitiated, // SlaveMode + 400000, // ConnectionSpeed + AddressingMode7Bit, // AddressingMode + "\\_SB.I2C1", // ResourceSource + ) + Interrupt (ResourceConsumer, Edge, ActiveLow) + { + BOARD_TRACKPAD_IRQ + } + }) + + Method (_STA) + { + If (LEqual (\S1EN, 1)) { + Return (0xF) + } Else { + Return (0x0) + } + } + + /* Allow device to power off in S0 */ + Name (_S0W, 4) + } + + Device (ATPA) + { + Name (_HID, "ATML0000") + Name (_DDN, "Atmel Touchpad") + Name (_UID, 2) + Name (ISTP, 1) /* Touchpad */ + + Name (_CRS, ResourceTemplate() + { + I2cSerialBus ( + 0x4b, // SlaveAddress + ControllerInitiated, // SlaveMode + 400000, // ConnectionSpeed + AddressingMode7Bit, // AddressingMode + "\\_SB.I2C1", // ResourceSource + ) + Interrupt (ResourceConsumer, Edge, ActiveLow) + { + BOARD_TRACKPAD_IRQ + } + }) + + Method (_STA) + { + If (LEqual (\S1EN, 1)) { + Return (0xF) + } Else { + Return (0x0) + } + } + + /* Allow device to power off in S0 */ + Name (_S0W, 4) + } + + Device (ETPA) + { + Name (_HID, "ELAN0000") + Name (_DDN, "Elan Touchpad") + Name (_UID, 3) + Name (ISTP, 1) /* Touchpad */ + + Name (_CRS, ResourceTemplate() + { + I2cSerialBus ( + 0x15, // SlaveAddress + ControllerInitiated, // SlaveMode + 400000, // ConnectionSpeed + AddressingMode7Bit, // AddressingMode + "\\_SB.I2C1", // ResourceSource + ) + Interrupt (ResourceConsumer, Edge, ActiveLow) + { + BOARD_TRACKPAD_IRQ + } + }) + + Method (_STA) + { + If (LEqual (\S1EN, 1)) { + Return (0xF) + } Else { + Return (0x0) + } + } + + /* Allow device to power off in S0 */ + Name (_S0W, 4) + } +} + +Scope (\_SB.I2C2) +{ + Device (CODC) + { + /* + * TODO(dlaurie): Need official HID. + * + * The current HID is created from the Maxim Integrated + * PCI Vendor ID 193Ch and a shortened device identifier. + */ + Name (_HID, "193C9890") + Name (_DDN, "Maxim 98090 Codec") + Name (_UID, 1) + + Name (_CRS, ResourceTemplate() + { + I2cSerialBus ( + 0x10, // SlaveAddress + ControllerInitiated, // SlaveMode + 400000, // ConnectionSpeed + AddressingMode7Bit, // AddressingMode + "\\_SB.I2C2", // ResourceSource + ) + Interrupt (ResourceConsumer, Edge, ActiveLow) + { + BOARD_CODEC_IRQ + } + }) + + Method (_STA) + { + If (LEqual (\S2EN, 1)) { + Return (0xF) + } Else { + Return (0x0) + } + } + } +} + +Scope (\_SB.I2C5) +{ + Device (ALSI) + { + /* + * TODO(dlaurie): Need official HID. + * + * The current HID is created from the Intersil PNP + * Vendor ID "LSD" and a shortened device identifier. + */ + Name (_HID, EisaId ("LSD2918")) + Name (_DDN, "Intersil 29018 Ambient Light Sensor") + Name (_UID, 1) + + Name (_CRS, ResourceTemplate() + { + I2cSerialBus ( + 0x44, // SlaveAddress + ControllerInitiated, // SlaveMode + 400000, // ConnectionSpeed + AddressingMode7Bit, // AddressingMode + "\\_SB.I2C5", // ResourceSource + ) + Interrupt (ResourceConsumer, Edge, ActiveLow) + { + BOARD_ALS_IRQ + } + }) + + Method (_STA) + { + If (LEqual (\S5EN, 1)) { + Return (0xF) + } Else { + Return (0x0) + } + } + } +} + +Scope (\_SB.LPEA) +{ + Name (GBUF, ResourceTemplate () + { + /* Jack Detect (index 0) */ + GpioInt (Edge, ActiveHigh, Exclusive, PullNone,, + "\\_SB.GPSC") { 14 } + + /* Mic Detect (index 1) */ + GpioInt (Edge, ActiveHigh, Exclusive, PullNone,, + "\\_SB.GPSC") { 15 } + }) +} |