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authorDtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>2021-08-09 13:39:03 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-08-24 19:09:47 +0000
commit5b32be2db63b4e85c5ca158dc805543f7be95558 (patch)
tree545a0cfe044f7c0758d7af0892be62c3f47b3c56 /src/mainboard/google/dedede
parentd9bac169ba0e3c0f9f7a4fa50c01e6791c1551fe (diff)
mb/google/dedede/var/cret: Add new G2Touch touchscreen
Add G2Touch G7500 touchscreen into devicetree for cret. BUG=b:180547621 BRANCH=dedede TEST=Built cret firmware and verified touchscreen function. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: I57638bf8a3eb4efcd819f5433fa54c22b7af3054 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56871 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/dedede')
-rw-r--r--src/mainboard/google/dedede/variants/cret/overridetree.cb19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/cret/overridetree.cb b/src/mainboard/google/dedede/variants/cret/overridetree.cb
index afed775122..8f65c61df0 100644
--- a/src/mainboard/google/dedede/variants/cret/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/cret/overridetree.cb
@@ -228,6 +228,25 @@ chip soc/intel/jasperlake
register "hid_desc_reg_offset" = "0x01"
device i2c 5d on end
end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""GTCH7502""
+ register "generic.desc" = ""G2TOUCH Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D4_IRQ)"
+ register "generic.probed" = "1"
+ register "generic.reset_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D5)"
+ register "generic.reset_delay_ms" = "100"
+ register "generic.stop_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)"
+ register "generic.stop_delay_ms" = "30"
+ register "generic.enable_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
+ register "generic.enable_delay_ms" = "30"
+ register "generic.has_power_resource" = "1"
+ register "generic.disable_gpio_export_in_crs" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 40 on end
+ end
end # I2C 2
device pci 15.3 off end # I2C 3
device pci 1c.7 on end