diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2021-03-12 11:51:55 -0700 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2021-03-15 16:08:22 +0000 |
| commit | ab8961e7be8ec6da5ad2d0dcaf6402bef419c210 (patch) | |
| tree | f18a67eccf2824407591e9d63838ca495459ce87 /src/mainboard/google/dedede/variants | |
| parent | 1295fa218fc2b02d5e143d15edb1c5c09221a508 (diff) | |
mb/google/dedede/var/madoo: Fix DPTF passive and critical policies
Some of the temperature sensors defined in baseboard do not exist in
madoo. With the format the DPTF policies are defined in madoo, all the
entries from the baseboard are included and then the overrides applied.
This causes the non-existent DPTF devices to be exported in the ACPI
table and in turn OS reading invalid temperatures. Fix the format for
DPTF passive and critical policies.
BUG=b:182513022
BRANCH=dedede
TEST=Build and boot to OS in madoo. Ensure that the DPTF entries look
correct in both static.c and SSDT tables i.e. passive and critical
policies for applicable devices only are present.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: Idc5d0b357d61b9346b4d20ec8322b124c9655b4c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51456
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Ben Kao <ben.kao@intel.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants')
| -rw-r--r-- | src/mainboard/google/dedede/variants/madoo/overridetree.cb | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/mainboard/google/dedede/variants/madoo/overridetree.cb b/src/mainboard/google/dedede/variants/madoo/overridetree.cb index e754882ee7..7acacb0c8c 100644 --- a/src/mainboard/google/dedede/variants/madoo/overridetree.cb +++ b/src/mainboard/google/dedede/variants/madoo/overridetree.cb @@ -69,8 +69,14 @@ chip soc/intel/jasperlake device domain 0 on device pci 04.0 on chip drivers/intel/dptf - register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 65, 1000)" - register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)" + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 65, 1000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000)}" + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 100, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN)}" register "controls.power_limits.pl1" = "{ .min_power = 4800, .max_power = 6000, |