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authorKarthikeyan Ramasubramanian <kramasub@google.com>2020-03-15 23:25:37 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-03-17 08:16:25 +0000
commit672f7d7b2d7adbd7e2d041d627d96a33de9b8b11 (patch)
tree3f9f0924f6adb82842c74b878fc97019e5c3cb8a /src/mainboard/google/dedede/variants
parentd3dab12244f7d0a704b6e245204e4ca52aaf699a (diff)
mb/google/dedede: Add waddledee variant
Add initial support for waddledee variant board. BUG=b:151576904 TEST=Build the mainboard and variant board. Change-Id: I20d41fbbb78c7fd2f964a97ffebbc9c3bbfb1c5c Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39580 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants')
-rw-r--r--src/mainboard/google/dedede/variants/waddledee/Makefile.inc11
-rw-r--r--src/mainboard/google/dedede/variants/waddledee/include/variant/ec.h14
-rw-r--r--src/mainboard/google/dedede/variants/waddledee/include/variant/gpio.h14
-rw-r--r--src/mainboard/google/dedede/variants/waddledee/overridetree.cb40
4 files changed, 79 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/waddledee/Makefile.inc b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc
new file mode 100644
index 0000000000..c55051b9fc
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc
@@ -0,0 +1,11 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2020 The coreboot project Authors.
+##
+## SPDX-License-Identifier: GPL-2.0-or-later
+##
+
+SPD_SOURCES = empty #0b0000
+SPD_SOURCES += Micron_MT53E512M32D2NP_2GB #0b0001
+SPD_SOURCES += samsung-K4U6E3S4AA-MGCL #0b0010
diff --git a/src/mainboard/google/dedede/variants/waddledee/include/variant/ec.h b/src/mainboard/google/dedede/variants/waddledee/include/variant/ec.h
new file mode 100644
index 0000000000..cc897dcdcf
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/waddledee/include/variant/ec.h
@@ -0,0 +1,14 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2020 The coreboot project Authors.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef MAINBOARD_EC_H
+#define MAINBOARD_EC_H
+
+#include <baseboard/ec.h>
+
+#endif
diff --git a/src/mainboard/google/dedede/variants/waddledee/include/variant/gpio.h b/src/mainboard/google/dedede/variants/waddledee/include/variant/gpio.h
new file mode 100644
index 0000000000..bf23f6e457
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/waddledee/include/variant/gpio.h
@@ -0,0 +1,14 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2020 The coreboot project Authors.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef MAINBOARD_GPIO_H
+#define MAINBOARD_GPIO_H
+
+#include <baseboard/gpio.h>
+
+#endif /* MAINBOARD_GPIO_H */
diff --git a/src/mainboard/google/dedede/variants/waddledee/overridetree.cb b/src/mainboard/google/dedede/variants/waddledee/overridetree.cb
new file mode 100644
index 0000000000..23db34e66c
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/waddledee/overridetree.cb
@@ -0,0 +1,40 @@
+chip soc/intel/tigerlake
+
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C0 | Trackpad |
+ #| I2C1 | Digitizer |
+ #| I2C2 | Touchscreen |
+ #| I2C3 | Camera |
+ #| I2C4 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[1] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ }"
+
+ device domain 0 on end
+end