diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2020-04-20 11:37:52 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-01 06:15:26 +0000 |
| commit | 8d09cf61860e743b35a9158163654c8d2bd3c189 (patch) | |
| tree | cb1b278ffa89d1b0b198e9fe2cbeebf78cc465ea /src/mainboard/google/dedede/variants/waddledee | |
| parent | f60a8f02c5d6eed7249a4e60c1d6df373d047eb0 (diff) | |
mb/google/dedede: Remove pad termination for RAM_STRAP_4
The stuffed resistor straps are weaker compared to the internal pull-up.
This can cause the GPIO to read '1' always. Remove the internal pull-up.
Also read the GPIO only on the boards where the board version is
populated.
BUG=b:154301008
TEST=Build and boot the mainboard.
Change-Id: Ib640211b9f50dfb0174a570eda1625bacbebb855
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40531
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants/waddledee')
| -rw-r--r-- | src/mainboard/google/dedede/variants/waddledee/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/mainboard/google/dedede/variants/waddledee/memory.c | 22 |
2 files changed, 24 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/waddledee/Makefile.inc b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc index fb9b4f45fc..d3d6452743 100644 --- a/src/mainboard/google/dedede/variants/waddledee/Makefile.inc +++ b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc @@ -7,3 +7,5 @@ SPD_SOURCES = Micron_MT53E512M32D2NP_2GB #0b0000 SPD_SOURCES += empty #0b0001 + +romstage-y += memory.c diff --git a/src/mainboard/google/dedede/variants/waddledee/memory.c b/src/mainboard/google/dedede/variants/waddledee/memory.c new file mode 100644 index 0000000000..d1e8af2c59 --- /dev/null +++ b/src/mainboard/google/dedede/variants/waddledee/memory.c @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <baseboard/variants.h> +#include <baseboard/gpio.h> +#include <ec/google/chromeec/ec.h> +#include <gpio.h> + +bool variant_mem_is_half_populated(void) +{ + uint32_t board_ver; + + /* On boards where board version is populated, ram strap is also populated */ + if (!google_chromeec_get_board_version(&board_ver)) + return !gpio_get(GPIO_MEM_CH_SEL); + + return false; +} |