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authorDavid Wu <david_wu@quanta.corp-partner.google.com>2022-01-24 10:57:45 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-01-27 14:46:40 +0000
commit8d6c1c2d0e0691969ffa516f86aa6c3b410923eb (patch)
tree3c9560c147fcfe66c33e6a4e01672751b3cb1bcc /src/mainboard/google/dedede/variants/metaknight/overridetree.cb
parent79effad1fc743f43ffd37b592b46b2ac94a6a933 (diff)
mb/google/dedede/var/metaknight: Set core display clock to 172.8 MHz
When using the default initial core display clock frequency, Metaknight has a rare stability issue where the startup of Chrome OS in secure mode may hang. Slowing the initial core display clock frequency down to 172.8 MHz as per Intel recommendation avoids this problem. The CdClock=0xff is set in dedede baseboard,and we overwrite it as 0x0 (172.8 MHz) for metaknight. BUG=None BRANCH=dedede TEST=Build firmware and verify on fail DUTs. Check the DUTs can boot up in secure mode well. Change-Id: I987277fec2656fe6f10827bc6685d3d04093235e Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61327 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants/metaknight/overridetree.cb')
-rw-r--r--src/mainboard/google/dedede/variants/metaknight/overridetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/metaknight/overridetree.cb b/src/mainboard/google/dedede/variants/metaknight/overridetree.cb
index bb4762f82c..06da2d48c3 100644
--- a/src/mainboard/google/dedede/variants/metaknight/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/metaknight/overridetree.cb
@@ -69,6 +69,9 @@ chip soc/intel/jasperlake
.tdp_pl2_override = 12,
}"
+ # Core Display Clock Frequency selection
+ register "cd_clock" = "CD_CLOCK_172_8_MHZ"
+
device domain 0 on
device pci 04.0 on
chip drivers/intel/dptf