diff options
author | FrankChu <Frank_Chu@pegatron.corp-partner.google.com> | 2020-11-24 15:49:14 +0800 |
---|---|---|
committer | Paul Fagerburg <pfagerburg@chromium.org> | 2020-11-25 21:29:46 +0000 |
commit | 8b0c1c8027cc4ba1e139d90102d6236746de2def (patch) | |
tree | b750a2be3bfd9e44aa015dce2d30dbaf846788ba /src/mainboard/google/dedede/variants/galtic/overridetree.cb | |
parent | 1856effaf2397edc3e00b8c2cf2acdb9f6bd935e (diff) |
mb/google/dedede: Create galtic variant
Create the galtic variant of the waddledee reference board by
copying the template files to a new directory named for the variant.
(Auto-Generated by create_coreboot_variant.sh version 4.3.1).
BUG=b:170913840
BRANCH=None
TEST=util/abuild/abuild -p none -t google/dedede -x -a
make sure the build includes GOOGLE_GALTIC
Signed-off-by: FrankChu <Frank_Chu@pegatron.corp-partner.google.com>
Change-Id: Ie7534d56bc67aca4484f40af1221d669addc01fd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47900
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/dedede/variants/galtic/overridetree.cb')
-rw-r--r-- | src/mainboard/google/dedede/variants/galtic/overridetree.cb | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/galtic/overridetree.cb b/src/mainboard/google/dedede/variants/galtic/overridetree.cb new file mode 100644 index 0000000000..404024b1d6 --- /dev/null +++ b/src/mainboard/google/dedede/variants/galtic/overridetree.cb @@ -0,0 +1,42 @@ +chip soc/intel/jasperlake + + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| GSPI0 | cr50 TPM. Early init is | + #| | required to set up a BAR | + #| | for TPM communication | + #| | before memory is up | + #| I2C0 | Trackpad | + #| I2C1 | Digitizer | + #| I2C2 | Touchscreen | + #| I2C3 | Camera | + #| I2C4 | Audio | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .gspi[0] = { + .speed_mhz = 1, + .early_init = 1, + }, + .i2c[0] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[1] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[2] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[3] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[4] = { + .speed = I2C_SPEED_FAST, + }, + }" + + device domain 0 on + device pci 15.0 on end + end +end |